Integrated circuit design

Global Electronic Design Automation Market 2019-2023 | 7% CAGR Projection Over the Next Five Years | Technavio

Retrieved on: 
Tuesday, December 17, 2019

The electronic design automation market size is poised to grow at a CAGR of almost 7% during the period 2019-2023, according to the latest market research report by Technavio.

Key Points: 
  • The electronic design automation market size is poised to grow at a CAGR of almost 7% during the period 2019-2023, according to the latest market research report by Technavio.
  • View the full release here: https://www.businesswire.com/news/home/20191217005532/en/
    Technavio has announced its latest market research report titled global electronic design automation market 2019-2023.
  • (Graphic: Business Wire)
    The global semiconductor market is recording a rapid technological transformation, which is giving rise to rapid product development and reduced time-to-market for developed products.
  • This market research report segments the electronic design automation market by product (semiconductor IP, CAE, IC physical design and verification, PCB, and others), deployment (on-premises and cloud-based), and geography (the Americas, APAC, and EMEA).

57th Design Automation Conference Designer and IP Track Submission Site Open

Retrieved on: 
Tuesday, December 17, 2019

The Design Automation Conference (DAC) is now accepting submissions for the 57th DAC Designer and IP Track.

Key Points: 
  • The Design Automation Conference (DAC) is now accepting submissions for the 57th DAC Designer and IP Track.
  • The focus of the Designer Track is on the flows and methodologies deployed for ASIC design, verification, implementation and software integration by the user, said Designer and IP Track Chair, Renu Mehra of Synopsys.
  • The IP Track at DAC has grown significantly over the past five years since inception, said IP Track Co-Chair, Randy Fish of UltraSoC.
  • The Designer Track and IP Track differ from vendor-specific user forums in that they are not tied to a specific EDA vendor.

CompoundTek Collaborates with Cadence and Lumerical to Deliver Integrated Electronic-Photonic Design Automation PDK for Silicon Photonics ICs

Retrieved on: 
Thursday, December 12, 2019

The PDK consists of a new, advanced electronic-photonic design automation (EPDA) flow with features aimed at further advancing the development of differentiated SiPh solutions.

Key Points: 
  • The PDK consists of a new, advanced electronic-photonic design automation (EPDA) flow with features aimed at further advancing the development of differentiated SiPh solutions.
  • The PDK is based on the Cadence Virtuoso custom IC design platform, utilizing the Cadence CurvyCore engine, Cadence Spectre simulation platform and the electrical-optical co-simulation capability in Lumerical's photonic integrated circuit simulator INTERCONNECT.
  • Using the Cadence CurvyCore technology, users of the CompoundTek PDK can systematically manage curvilinear shapes within the Cadence Virtuoso design environment.
  • "The PDK incorporates the Cadence schematic and layout-driven photonics design flow, enabling mutual customers to achieve SoC design excellence and deliver products to market faster."

vSync Circuits Adds Verific’s Static Elaborator to Product Mix

Retrieved on: 
Tuesday, December 3, 2019

ALAMEDA, Calif., Dec. 03, 2019 (GLOBE NEWSWIRE) -- Verific Design Automation today announced long-time customer vSync Circuits added Verifics static elaboration to its product mix and introduced vLinter, early rule-based design analysis and verification software.

Key Points: 
  • ALAMEDA, Calif., Dec. 03, 2019 (GLOBE NEWSWIRE) -- Verific Design Automation today announced long-time customer vSync Circuits added Verifics static elaboration to its product mix and introduced vLinter, early rule-based design analysis and verification software.
  • Our relationship with Verific is one of great mutual admiration, remarks Dr. Reuven Dobkin, chief executive officer and chief technology officer of vSync.
  • vSync Circuits is an EDA and IP solutions company providing integration and verification solutions for ASIC and FPGA design and verification groups.
  • vSync Circuits methodology is generic and is compatible with all different design flows.

North America Electronic Design Automation Market to 2027 - Regional Analysis and Forecasts by Type and Application

Retrieved on: 
Tuesday, November 12, 2019

The significant growth of the semiconductor industry is anticipated to boost the electronic design automation market growth.

Key Points: 
  • The significant growth of the semiconductor industry is anticipated to boost the electronic design automation market growth.
  • Moreover, the increased focus on miniaturization of electronic devices is expected to boost the electronic design automation market growth in the forecast period.
  • Based on the application segment, the consumer electronics segment of the electronic design automation market led the North America market in 2018 with a maximum market share and is expected to continue its dominance during the forecast period.Consumer electronics is a significant industry for the adoption of electronic design automation technology for a range of devices.
  • The overall electronic design automation market size has been derived using both primary and secondary source.The research process begins with exhaustive secondary research using internal and external sources to obtain qualitative and quantitative information related to the electronic design automation market.

Synopsys VC LP for Low Power Signoff Verification Delivers Up to 5X Runtime Gain at Samsung

Retrieved on: 
Thursday, November 7, 2019

"Maintaining performance and quality of results during low-power verification signoff is a must-have requirement," said Jung Yun Choi, vice president of Foundry Design Technology Team at Samsung Electronics.

Key Points: 
  • "Maintaining performance and quality of results during low-power verification signoff is a must-have requirement," said Jung Yun Choi, vice president of Foundry Design Technology Team at Samsung Electronics.
  • "Using the Signoff Abstract Model flow in the VC LP solution enables us to accelerate static low-power verification by 5X, and ensureshigh-quality QoR and signoff for our ASIC designs.
  • This technique helps to significantly reduce the overall turnaround time for verification signoff to ensure that subtle bugs do not escape into silicon.
  • Synopsys hosted two webinars to introduce the hierarchical flow and machine learning-enabled solutions in VC LP.

Agnisys Launches Global Distribution, Enhancing Service and Support for its Growing User Base Around the World

Retrieved on: 
Tuesday, October 29, 2019

See Agnisys at DVCON Europe in Munich, Germany on October 29-30, 2019, presenting Test Sequence Generator for RISC-V cores and SoCs .

Key Points: 
  • See Agnisys at DVCON Europe in Munich, Germany on October 29-30, 2019, presenting Test Sequence Generator for RISC-V cores and SoCs .
  • Agnisys, Inc. is a leading supplier of Electronic Design Automation (EDA) software for solving complex design and verification problems for system development.
  • Based on patented technology and intuitive user interfaces, its products increase productivity and efficiency while eliminating system design and verification errors.
  • Founded in 2007, Agnisys is based in Boston, Massachusetts with R&D centers in the United States and India.

The electronic design automation (EDA) tools market was valued at USD 6.32 billion in 2018, and is projected to reach USD 9.49 billion by 2024, registering a CAGR of 7.8%, during the forecast period (2019

Retrieved on: 
Monday, October 28, 2019

The electronic design automation (EDA) tools market was valued at USD 6.32 billion in 2018, and is projected to reach USD 9.49 billion by 2024, registering a CAGR of 7.8%, during the forecast period (2019-2024).

Key Points: 
  • The electronic design automation (EDA) tools market was valued at USD 6.32 billion in 2018, and is projected to reach USD 9.49 billion by 2024, registering a CAGR of 7.8%, during the forecast period (2019-2024).
  • Electronic design automation (EDA) tools have provided the silicon industry with the ability to innovate over the past few years.
  • The booming automotive, IoT, and AI sectors drive the growth of the semiconductor market, which requires electronic devices with complex designs.
  • Electronic design automation (EDA) is a term for a category of software products and processes that help to design electronic systems with the aid of computers.

Cadence Automotive Reference Flow Certified by Samsung Foundry for Advanced-Node Design Creation

Retrieved on: 
Thursday, October 17, 2019

Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that Samsung Foundry certified a new Cadence reference flow for the creation of advanced-node automotive designs.

Key Points: 
  • Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that Samsung Foundry certified a new Cadence reference flow for the creation of advanced-node automotive designs.
  • Cadence and Samsung Foundry collaborated on the development of the reference design, which was validated using the Samsung Foundry 8nm Low-Power Plus (8LPP) process technology.
  • The certified Cadence automotive flow includes the following technologies:
    Digital and signoff suite, which enables the fastest turnaround time (TAT) and optimal design closure without expensive margins or iterations.
  • The Cadence automotive reference flow, including the digital and signoff, verification and custom IC design suites, provides customers with a faster path to design closure and better predictability.

Cadence Custom/AMS Flow Certified for Samsung 5LPE Process Technology

Retrieved on: 
Thursday, October 17, 2019

Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that its custom and analog/mixed-signal (AMS) IC design flow has achieved certification for Samsung Foundrys 5nm Low-Power Early (5LPE) process technology.

Key Points: 
  • Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that its custom and analog/mixed-signal (AMS) IC design flow has achieved certification for Samsung Foundrys 5nm Low-Power Early (5LPE) process technology.
  • For more information on the Cadence custom and AMS flow that supports the Samsung 5LPE process technology, visit www.cadence.com/go/Samsung5LPE .
  • The certified Cadence custom and AMS flow enables customers to develop their solutions using the 5LPE process for automotive, mobile, data center, artificial intelligence (AI) and other emerging applications.
  • Weve validated that the entire Cadence AMS flow meets our requirements for designing at 5LPE technology, said Jongshin Shin, vice president of Foundry IP Development Team at Samsung Electronics.