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Lattice Enhances Radiant Design Software with Expanded Functional Safety Capabilities

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星期一, 三月 25, 2024
Software, Networks, Internet, Hardware, Electronic Design Automation, Data Management, Technology, Semiconductor, Product marketing, Radiant, Synopsys, Lattice Semiconductor, IEC 61508, TMR, LSCC, System, IEC, I'm Upset, Marketing, Static timing analysis, Soft error, Lattice, Safety, DO-254, ISO, ISO 26262, Engineering, FPGA, Corporation, Sintering

Lattice Semiconductor (NASDAQ: LSCC), the low power programmable leader, today announced the latest release of its award-winning Lattice Radiant® design software, featuring expanded functional safety and reliability capabilities.

Key Points: 
  • Lattice Semiconductor (NASDAQ: LSCC), the low power programmable leader, today announced the latest release of its award-winning Lattice Radiant® design software, featuring expanded functional safety and reliability capabilities.
  • Now featuring integration with the latest Synopsys Synplify® FPGA synthesis tool with TMR, Lattice Radiant offers an advanced design automation flow solution that enables designers to more easily develop Lattice FPGA-based applications with the robust functional safety protections, high reliability, and dependable operation required for the Industrial, Automotive, and Avionics markets.
  • Establishing protocols for functional safety and error mitigation compliant with industry standards, namely DO-254, IEC 61508, and ISO 26262, is integral to developing and validating highly reliable and safety-critical designs.
  • “The latest Radiant software with Synopsys TMR capabilities will provide automated synthesis protocol with enhanced efficiency and reliability, enabling designers to further explore the robustness of our low power, small form factor FPGAs.”
    The latest Lattice Radiant release includes:
    Safety Critical Block-Based Design Flow.

Avalanche Technology Presents Solutions for Satellite Mission Adaptability at the SEE-MAPLD Workshop

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星期一, 五月 8, 2023
Single, Silver Bullet, Radiation, Firmware, Magic, Defense, Electronics, Research, Burn, SOC, MRAM, Government, AGC Aerospace & Defense, Workshop, Avalanche, FOTA, Aerospace, I'm Upset, Chronic radiation syndrome, Artificial intelligence, JEDEC, Ecosystem, Windows Update, SEE, Video game

FREMONT, Calif., May 8, 2023 /PRNewswire-PRWeb/ -- Avalanche Technology, the leader in next generation MRAM technology is pleased to continue demonstrating support for the Radiation Hardened Electronics Community by sharing valued solutions to longstanding challenges and evolving threats. Paul Chopelas, Avalanche General Manager, is honored to present solutions enabling satellite mission adaptability at the upcoming Single Event Effects (SEE) Symposium and Military and Aerospace Programmable Logic Devices (MAPLD) Workshop. Held in La Jolla, CA May 17th & 18th, SEE MAPLD is a joint workshop focusing on single event radiation effects in microelectronics combined with increasing need for and use of programmable logic devices in aerospace and defense applications.

Key Points: 
  • Paul Chopelas, Avalanche General Manager, is honored to present solutions enabling satellite mission adaptability at the upcoming Single Event Effects (SEE) Symposium and Military and Aerospace Programmable Logic Devices (MAPLD) Workshop.
  • Until recently, prior limitations of processing and memory technology have historically rendered this aspiration impossible.
  • The combined solution allows reimagined satellite system architectures now capable of mission adaptability, enhanced resilience and real time responsiveness.
  • "Avalanche Technology continues to listen and respond to the needs of the Aerospace & Defense community in order to provide these valued solutions on a commercial timeline," said Paul Chopelas, General Manager at Avalanche Technology.