Integrated circuits

Analog Devices Announces Complete Radio Platform for 5G O-RAN Ecosystem

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星期四, 三月 25, 2021
Data management, Consumer electronics, Technology, Semiconductor, Telecommunications, Software, Networks, Internet, VoIP, Mobile, Wireless, Hardware, Technology, Science and technology, Mobile telecommunications, Computing, Hardware acceleration, Integrated circuits, 5G, Internet of things, Technology forecasting, Application-specific integrated circuit

Analog Devices, Inc. (Nasdaq: ADI) today announced an ASIC-based radio platform for O-RAN compliant 5G radio units that is designed to shorten time to market and meet the evolving needs of 5G networks.

Key Points: 
  • Analog Devices, Inc. (Nasdaq: ADI) today announced an ASIC-based radio platform for O-RAN compliant 5G radio units that is designed to shorten time to market and meet the evolving needs of 5G networks.
  • View the full release here: https://www.businesswire.com/news/home/20210325005195/en/
    Analog Devices Announces Complete Radio Platform for 5G O-RAN Ecosystem (Graphic: Business Wire)
    ADIs radio platform includes all the core functionality needed in an O-RAN compliant 5G radio unit, including a baseband ASIC, software defined transceivers, signal processing, and power.
  • ADIs new O-RAN compliant solution marks a major step forward for the ecosystem by providing a performance optimized radio platform for 5G applications.
  • The Analog Devices platform allows radio designers and manufacturers to optimize total system performance for macro and small cell solutions.

Synopsys Collaborates with Keysight Technologies to Deliver Integrated Custom Design Flow for 5G Designs

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星期三, 三月 24, 2021
Software, OpenAccess, Proprietary software, Synopsys, Compiler, Computing, Electronic design automation, Integrated circuits

The collaboration between Keysight and Synopsys includes developing and validating a tightly integrated solution that enables customers to use RFPro and Custom Compiler in a unified RF design flow.

Key Points: 
  • The collaboration between Keysight and Synopsys includes developing and validating a tightly integrated solution that enables customers to use RFPro and Custom Compiler in a unified RF design flow.
  • The collaboration between Synopsys and Keysight will help customers achieve power and performance optimizations and deliver 5G designs more efficiently.
  • The custom design flow enables EM analysis with Keysight's RFPro within the Synopsys Custom Design Platform by utilizing the OpenAccess database and industry-standard interoperable PDKs provided by the foundries.
  • For more information about Custom Compiler, view a video highlighting the integrated solution, design flow and enablement optimized for 5G applications.

Achronix Adopts Movellus Maestro Clock Network for Its Speedster7t FPGAs

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星期二, 三月 23, 2021
Fabless semiconductor companies, Computing, Reconfigurable computing, Computer engineering, Technology, Hardware acceleration, Integrated circuits, Field-programmable gate array, Achronix, Xilinx, Virtex

SAN JOSE, Calif., March 23, 2021 /PRNewswire/ --Movellus, Inc. today announced that Achronix, a leader in high-performance FPGAs and embedded FPGA (eFPGA) IP, has adopted Movellus' Maestro intelligent clocking solution for its Speedster7t FPGAs.

Key Points: 
  • SAN JOSE, Calif., March 23, 2021 /PRNewswire/ --Movellus, Inc. today announced that Achronix, a leader in high-performance FPGAs and embedded FPGA (eFPGA) IP, has adopted Movellus' Maestro intelligent clocking solution for its Speedster7t FPGAs.
  • Speedster7t FPGAs are used in high-performance communications, artificial intelligence, machine learning, automotive driver assistance, compute acceleration, industrial and military applications.
  • The latest Speedster7t high-density and high-performance FPGA family is optimized to meet the growing demands of AI/ML and high-bandwidth data acceleration applications.
  • The company's flagship platform, Maestro is a clock distribution network platform that delivers chip-level architectural innovations to improve SoC performance while reducing power consumption.

Global Semiconductor (Silicon) Intellectual Property (SIP) Market Report 2020-2027: With Innovation Being the Biggest Loser Amid the COVID-19 Crisis - Market Plummets by -8.6% - ResearchAndMarkets.com

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星期二, 三月 23, 2021
Technology, Semiconductor, Technology, Semiconductor device fabrication, Emerging technologies, Digital electronics, Electronic engineering, Integrated circuits, Packaging, MOSFETs, Internet of things, SIP, Three-dimensional integrated circuit, Semiconductor intellectual property core

Nanoelectronics Accelerate Advancements in Semiconductor Design, Offering Opportunities for SIP Market

Key Points: 
  • Nanoelectronics Accelerate Advancements in Semiconductor Design, Offering Opportunities for SIP Market
    The 3D Age and the Need for 3D-IC Integration to Increase Design Complexity: Business Case for SIP
    IoT Ecosystem to Promote Advances in Semiconductors: High-Growth Area for IP Licensing
    Rising Demand for Smart/Connected Devices Prompts the Need for Smart Sensors: Potential Opportunity for SIP
    Cloud Adoption Fuels Cloud Equipment: An Opportunity Indicator for Semiconductor IP

Avalanche Technology and Redtree Solutions Announce Representation Agreement for EMEA

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星期一, 三月 22, 2021
Computer memory, Technology, Non-volatile memory, Computing, Spintronics, Science and technology, Emerging technologies, Magnetoresistive RAM, Integrated circuits, Random-access memory, Field-programmable gate array, Everspin Technologies

FREMONT, Calif., March 22, 2021 /PRNewswire-PRWeb/ -- Avalanche Technology, the leader in next generation MRAM technology, today announced that it has entered into an agreement with Redtree Solutions Ltd. to represent Avalanche in the sales of its STT-MRAM-based discrete P-SRAM non-volatile memory products in the Europe, Middle East and Africa (EMEA) regions.

Key Points: 
  • FREMONT, Calif., March 22, 2021 /PRNewswire-PRWeb/ -- Avalanche Technology, the leader in next generation MRAM technology, today announced that it has entered into an agreement with Redtree Solutions Ltd. to represent Avalanche in the sales of its STT-MRAM-based discrete P-SRAM non-volatile memory products in the Europe, Middle East and Africa (EMEA) regions.
  • "Avalanche's portfolio of STT-MRAM-based discrete memory devices complements and completes our portfolio of processors, MCUs, FPGAs, memory devices, connectivity devices and sensors.
  • "Redtree will enable us to have world-class local support for our customers in the Pan-European and Middle East regions."
  • Redtree has greater than 40 people, speaking local languages and covering 19 countries with more than 500 active customers.

Inphi Announces Commercial Availability and Production Ramp of COLORZ® II 400ZR and ZR+ QSFP-DD Transceivers

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星期一, 三月 22, 2021
Ethernet, Integrated circuits, Inphi Corporation, Electronics, Small form-factor pluggable transceiver, Telecommunications, Interconnect, Terabit Ethernet, Transceiver, Optical interconnect, Technology

SAN JOSE, Calif., March 22, 2021 (GLOBE NEWSWIRE) -- Inphi Corporation (NASDAQ: IPHI), a leader in high-speed data movement interconnects, today announced the commercial availability and production ramp of COLORZ II 400ZR, the industrys first QSFP-DD pluggable coherent transceivers for cloud data center interconnects (DCIs).

Key Points: 
  • SAN JOSE, Calif., March 22, 2021 (GLOBE NEWSWIRE) -- Inphi Corporation (NASDAQ: IPHI), a leader in high-speed data movement interconnects, today announced the commercial availability and production ramp of COLORZ II 400ZR, the industrys first QSFP-DD pluggable coherent transceivers for cloud data center interconnects (DCIs).
  • COLORZ II 400G ZR and ZR+ are the enabling technology for next-gen data center interconnects, said Josef Berger, AVP, Product Marketing, Optical Interconnect at Inphi.
  • The commercial availability of COLORZ II 400ZR makes IP over DWDM viable for network operators, said Andrew Schmitt, Directing Analyst.
  • COLORZ II 400ZR and 400ZR+ enable a dramatic increase in switch rack capacity while reducing power consumption by up to 80%.

Low-Voltage MOSFET Market to Grow by USD 1.18 billion during 2021-2025 | Key Vendor Insights and Segment Forecasts | Technavio

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星期一, 三月 22, 2021
Electronics industry, Transistors, Semiconductor devices, Digital electronics, Electronic design, Integrated circuits, Biosensors, MOSFET, Field-effect transistor

NEW YORK, March 22, 2021 /PRNewswire/ --The low-voltage MOSFET market is expected to reach USD 1.18 billion during 2021-2025, as per the latest report by Technavio.

Key Points: 
  • NEW YORK, March 22, 2021 /PRNewswire/ --The low-voltage MOSFET market is expected to reach USD 1.18 billion during 2021-2025, as per the latest report by Technavio.
  • In addition, the report predicts the market is expected to accelerate at a CAGR of over 4% during the forecast period.
  • The low-voltage MOSFET market growth is attributed to the increased investments in data centers.
  • The growth of the global low-voltage MOSFET market is driven by the increased investments in the deployment of new data centers.

GBT Seeking to Develop New EDA Technology to Achieve Improved IC DFM (Design for Manufacturing)

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星期四, 三月 18, 2021
Design, Electronic engineering, Integrated circuits, Electronic design automation, Electrical engineering, Mechanical engineering, Design rule checking, Design for manufacturability, Integrated circuit design

SAN DIEGO, March 18, 2021 (GLOBE NEWSWIRE) -- GBT Technologies Inc. ( OTC PINK:GTCH ) ("GBT or the Company), is seeking to develop a new EDA (Electronic Design Automation) technology to achieve ICs better DFM (Design For Manufacturing) analysis.

Key Points: 
  • SAN DIEGO, March 18, 2021 (GLOBE NEWSWIRE) -- GBT Technologies Inc. ( OTC PINK:GTCH ) ("GBT or the Company), is seeking to develop a new EDA (Electronic Design Automation) technology to achieve ICs better DFM (Design For Manufacturing) analysis.
  • The EDA R&D efforts will be concentrating on DFM rules analysis, physical layout geometrical rules (DRC) and nanometer silicon modeling.
  • GBT already started to address a key dependency between manufacturing and IC design; the Design Rule Check (DRC) aspect.
  • GBT envisions this system as a creation of a global mesh network using advanced nodes and super performing new generation IC technology.

POET Technologies Reports Significant Progress on Super Photonics Xiamen Joint Venture

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星期三, 三月 17, 2021
Integrated circuits, Optics, Photonics, Electromagnetism, Photonic integrated circuit, Interposer, Electromagnetic radiation

TORONTO, March 17, 2021 (GLOBE NEWSWIRE) -- POET Technologies Inc. (POET or the Company) (TSX Venture: PTK; OTCQX: POETF), the designer and developer of the POET Optical Interposer and Photonic Integrated Circuits (PICs) for the data center and tele-communication markets, today reported the progress made on Super Photonics Xiamen (SPX), its joint venture with Sanan IC.

Key Points: 
  • TORONTO, March 17, 2021 (GLOBE NEWSWIRE) -- POET Technologies Inc. (POET or the Company) (TSX Venture: PTK; OTCQX: POETF), the designer and developer of the POET Optical Interposer and Photonic Integrated Circuits (PICs) for the data center and tele-communication markets, today reported the progress made on Super Photonics Xiamen (SPX), its joint venture with Sanan IC.
  • Representing POET on the five-member SPX Board is Vivek Rajgarhia, POETs President & General Manager.
  • Recruited and nominated by POET for the second position on the Board is Dr. Xiaozhong Zheng, General Manager of SPX and former senior executive from the photonics industry, including most recently W.L.
  • POETs Optical Interposer eliminates costly components and labor-intensive assembly, alignment, burn-in and testing methods employed in conventional photonics.

Tachyum Nears Design Completion With 99 Percent of Layout Completed

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星期二, 三月 16, 2021
Software, Technology, Data management, Electronic design automation, Digital electronics, Integrated circuits, Electronic engineering, Hardware acceleration, Electrical engineering, Field-programmable gate array, Netlist, Logic design, Formal equivalence checking

Tachyums ability to achieve Prodigys 99 percent completion with a stable netlist layout and Clock Tree Synthesis (CTS) implemented is a last netlist milestone before final netlist and its tape-out.

Key Points: 
  • Tachyums ability to achieve Prodigys 99 percent completion with a stable netlist layout and Clock Tree Synthesis (CTS) implemented is a last netlist milestone before final netlist and its tape-out.
  • Tachyum has successfully compiled its Prodigy design to an FPGA emulation, moving it one step closer to meeting its goal of achieving production later this year.
  • The company also confirmed that Prodigy maintains netlist clock speed targets with no die size growth from its targets to ensure chip stability.
  • The march to 99 percent completion has been reached in leaps and bounds rather than small steps.