Accellera Announces IEEE 1800™-2023 Standard Available Through IEEE GET Program

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1800™-2023 Standard for SystemVerilog—Unified Hardware Design, Specification, and Verification Language—is now available for download without charge, courtesy of Accellera as part of the IEEE GET Program.

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GlobeNewswire, Inc.

Retrieved on:

Lundi, mars 4, 2024

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Dai, ELK, Verification, SystemVerilog, Electronics, Guaranteed Education Tuition Program, Language, Volunteering, IEEE Standards Association, EDA, API, Intellectual property, IEEE, RTL, Partnership, Consumer electronics

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ELK GROVE, CA, US

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Résumé

Key Points:

1800™-2023 Standard for SystemVerilog—Unified Hardware Design, Specification, and Verification Language—is now available for download without charge, courtesy of Accellera as part of the IEEE GET Program.
"Our close partnership with the IEEE Standards Association provides engineers with much needed standards fee-free,” stated Lu Dai, Accellera Chair.
To download the standard, visit the Accellera Downloads page/Available IEEE Standards .
For a list of Accellera and IEEE standards available for download at no cost, visit the Accellera Downloads page .

ELK GROVE, Calif., March 04, 2024 (GLOBE NEWSWIRE) -- Accellera Systems Initiative (Accellera), the electronics industry organization focused on the creation and adoption of electronic design automation (EDA) and intellectual property (IP) standards, announced today that the recently published IEEE Std. 1800™-2023 Standard for SystemVerilog—Unified Hardware Design, Specification, and Verification Language—is now available for download without charge, courtesy of Accellera as part of the IEEE GET Program.

"Our close partnership with the IEEE Standards Association provides engineers with much needed standards fee-free,” stated Lu Dai, Accellera Chair. “As a sponsor of the IEEE GET Program for over 13 years, engineers worldwide have access to the standards they need to help improve design and verification of advanced integrated circuits and embedded systems.”

IEEE Std. 1800™-2023 includes support for modeling hardware at the behavioral, register transfer (RTL), and gate abstractions, and for writing testbenches using coverage, assertions, object-oriented programming, and constrained random verification. The standard also provides application programming interfaces (APIs) to foreign programming languages. The SystemVerilog language is used in the design and verification of over 75% of electronic designs across the industry.

“The 2023 revision builds on the long history of SystemVerilog and the expertise of the many volunteers who have worked on the various versions of the standard for more than 20 years,” stated Tom Fitzpatrick, IEEE 1800™ Working Group Chair. “This version includes several enhancements to extend the capabilities of the language or to formalize features previously implemented as ad hoc additions in some tools. It also fixes several errata ranging from typographical errors to inconsistencies in previous versions and clarifies areas where previous versions were ambiguous.”

For more information about IEEE Std. 1800™-2023, visit the IEEE Standards Association page. To download the standard, visit the Accellera Downloads page/Available IEEE Standards.

The IEEE GET Program was established in 2010 to provide pre-paid access of selected standards to engineers and designers worldwide at no cost. The program helps expand the global reach of technical knowledge developed by the industry, accelerates standards adoption, and contributes to an open knowledge community to foster innovation. As a partner in the GET Program since its inception, Accellera has sponsored more than 175,000 downloads of Accellera-developed standards. For a list of Accellera and IEEE standards available for download at no cost, visit the Accellera Downloads page.

About Accellera
Accellera Systems Initiative is an independent, not-for-profit organization dedicated to create, support, promote, and advance system-level design, modeling, and verification standards for use by the worldwide electronics industry. The organization accelerates standards development and, as part of its ongoing collaboration with the IEEE, its standards are contributed to the IEEE Standards Association for formal standardization and ongoing change control. For more information, please visit www.accellera.org. Find out more about membership. Follow @accellera on Twitter and LinkedIn or to comment, please use #accellera. Accellera Global Sponsors are Cadence, Siemens EDA, and Synopsys.

Accellera and Accellera Systems Initiative are trademarks of Accellera Systems Initiative Inc. All other trademarks and trade names are the property of their respective owners.

For more information, contact:
Barbara Benjamin
Public Relations for Accellera Systems Initiative
Phone: +1 503 209 2323
Email: [email protected]