Si2 Forum Addresses Novel Approaches to Low-Power Semiconductor Design
Cosponsored by IEEE CEDA, the Si2 Low-Power Forum features ten leading semiconductor design architects, academics, and practitioners of electronic design automation.
Strategies for low-power and energy-efficient semiconductor design and how standards can advance these critical technologies is the focus of a Silicon Integration Initiative forum scheduled during the upcoming Design Automation Conference in San Francisco.
Power and Energy Efficiency in the Age of AI will be held Monday, July 11, 11:30 a.m. – 3:30 p.m., in Room 215 of the AMA Conference Center, located in the San Francisco Marriott Marquis. Admission is free and space is limited. Attendance via webinar is also available.
Cosponsored by IEEE CEDA, the Si2 Low-Power Forum features ten leading semiconductor design architects, academics, and practitioners of electronic design automation. They will present novel strategies and solutions for speeding the adoption of low-power design, and fabrication of semiconductors.
“Advanced system design architectures are limited by efficiency and scalability of low-power analysis,” said Leigh Anne Clevenger, Si2 vice president, technology. “Experts from industry and academia will present challenges and strategies that push the envelope on low-power and energy-efficient design. This foundation can lead to a roadmap of low-power to thermal management for such emerging vertical markets as autonomous, 5G to 6G transition, edge-compute and AI/ML.”
Si2 is also hosting a workshop on potential enhancements to the P2416 standard, including its own contributions and plans to meet design and research goals for low-power analysis. IEEE P2416 Power Modeling for System-Level Analysis is scheduled for Tuesday, July 12, 1:30 p.m. – 3:00 p.m. in Room 215 of the AMA Conference Center.
Advance registration is required for both events.
About Si2
Silicon Integration Initiative is a leading research and development joint venture providing standard interoperability solutions for silicon-to-systems. Si2 activities are conducted under the auspices of The National Cooperative Research and Production Act of 1993, the fundamental law that defines R&D joint ventures and offers them significant protection against federal antitrust laws. The Si2 membership includes more than 65 semiconductor and fabless manufacturers, foundries and EDA companies.
Primary initiatives
- OpenAccess Coalition—supports one of the world’s most widely used open-reference databases for IC design
- Compact Model Coalition—funds, develops and optimizes standard compact SPICE models and interfaces
- Artificial Intelligence/Machine Learning Special Interest Group—identifies and enables best practices in AI/ML strategies for EDA
- Technology Interoperability Trajectory Advisory CouNcil (TITAN)—collaborates to drive industry growth in crucial vertical semiconductor markets
- Unified Power Model Working Group—enables modeling consistency between applications and across design organizations
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