Fujitsu and Osaka University develop new quantum computing architecture, accelerating progress toward practical application of quantum computers
Retrieved on:
Thursday, March 23, 2023
The new architecture reduces the number of physical qubits required for quantum error correction - a prerequisite for the realization of fault-tolerant quantum computing - by 90% from 1 million to 10,000 qubits.
Key Points:
- The new architecture reduces the number of physical qubits required for quantum error correction - a prerequisite for the realization of fault-tolerant quantum computing - by 90% from 1 million to 10,000 qubits.
- Moving forward, Fujitsu and Osaka University will further refine this new architecture to lead the development of quantum computers in the early FTQC era, with the aim of applying quantum computing applications to a wide range of practical societal issues including material development and finance.
- Within conventional quantum computing architectures, calculations are performed using a combination of four error-corrected universal quantum gates (5) (CNOT, H, S, and T gate).
- To address these issues, Fujitsu and Osaka University developed a new, highly efficient analog rotation quantum computing architecture that is able to significantly reduce the number of physical qubits required for quantum error correction, and enable even quantum computers with 10,000 physical qubits to perform better than current classical computers, accelerating progress toward the realization of genuine, fault-tolerant quantum computing.