PCell

Artemis and Boldyn Networks Showcase 700 Mbps Mobile Network in Times Square

Retrieved on: 
Wednesday, February 21, 2024

Artemis Networks (Artemis) partnered with Boldyn Networks (Boldyn) in a Times Square proof of concept for pCell.

Key Points: 
  • Artemis Networks (Artemis) partnered with Boldyn Networks (Boldyn) in a Times Square proof of concept for pCell.
  • It took Boldyn less than 1 hour to install each Artemis radiohead site, including connectivity to Boldyn’s NYC fiber backbone network.
  • View the full release here: https://www.businesswire.com/news/home/20240221865409/en/
    Artemis partnered with Boldyn Networks in a Times Square proof of concept for pCell.
  • “Artemis is delighted to partner with Boldyn to showcase pCell testing in dense urban settings like Times Square, both at street level and in the subway,” said Steve Perlman, Artemis CEO.

Primarius to Showcase DTCO-Enabled EDA Solutions at DAC Powered by Next-Generation SPICE and FastSPICE Technology

Retrieved on: 
Thursday, July 6, 2023

“Visitors to our DAC booth will see the breadth of solutions to ensure designers meet time-to-market windows and optimize their designs for better yield, power, performance and area,” remarks Dr. Lianfeng Yang, President at Primarius Technologies.

Key Points: 
  • “Visitors to our DAC booth will see the breadth of solutions to ensure designers meet time-to-market windows and optimize their designs for better yield, power, performance and area,” remarks Dr. Lianfeng Yang, President at Primarius Technologies.
  • NanoSpice X shows significant new improvements in large post-layout SPICE simulation for full-chip analog designs with complicated digital circuits where huge power and ground nets slowed SPICE simulation previously.
  • Both circuit analysis solutions offer comprehensive high-yield and signal integrity analysis, aging and EM/IR simulation and advanced circuit checking capabilities.
  • To arrange a meeting or demonstration of the Primarius Technologies product portfolio, send email to: [email protected] .

Cadence Introduces EMX Designer, Delivering More Than 10X Increased Performance for On-Chip Passive Component Synthesis

Retrieved on: 
Thursday, April 13, 2023

Seamlessly integrated with the Cadence Virtuoso® ADE Product Suite, the EMX Designer solution offers more than 10X faster synthesis times, with significant productivity gains versus other solutions.

Key Points: 
  • Seamlessly integrated with the Cadence Virtuoso® ADE Product Suite, the EMX Designer solution offers more than 10X faster synthesis times, with significant productivity gains versus other solutions.
  • The EMX Designer solution lets customers rapidly synthesize DRC-clean passive devices at a touch of a button, based on electrical and geometrical requirements.
  • When used with the EMX 3D Planar Solver, the industry’s gold-standard electromagnetic modeling engine, the EMX Designer solution ensures the accuracy of generated models.
  • EMX Designer offers us a versatile library of passive devices, delivering extremely accurate results across all process nodes at incredibly fast speeds.”
    The EMX Designer solution seamlessly interfaces with Cadence EMX 3D Planar Solver and further supports the Cadence Intelligent System Design™ strategy, enabling system-on-chip (SoC) design excellence and system innovation.

Distributed mMIMO, Radio Stripes, HBF Antennas, and pCells Among the Revolutionary Technologies for Indoor Networks

Retrieved on: 
Thursday, January 26, 2023

The ever-growing need to increase network capacity and costly on-site infrastructure upgrades motivate infrastructure vendors to invest in other innovative technologies.

Key Points: 
  • The ever-growing need to increase network capacity and costly on-site infrastructure upgrades motivate infrastructure vendors to invest in other innovative technologies.
  • According to a new report from global technology intelligence firm ABI Research, some revolutionary technologies include Distributed massive Multiple-Input Multiple-Output (mMIMO), Radio Stripes, Holographic Beam Forming (HBF) antennas, pCell technology, Open Radio Access Network (RAN) DASs, and Reconfigurable Intelligent Surfaces (RISs).
  • Among the technologies, Distributed mMIMO, HBF, and pCell are already available and expected to be deployed on a larger scale in 2023.
  • These findings are from ABI Research's Revolutionary Technologies for Indoor Cellular Networks application analysis report.

Distributed mMIMO, Radio Stripes, HBF Antennas, and pCells Among the Revolutionary Technologies for Indoor Networks

Retrieved on: 
Thursday, January 26, 2023

The ever-growing need to increase network capacity and costly on-site infrastructure upgrades motivate infrastructure vendors to invest in other innovative technologies.

Key Points: 
  • The ever-growing need to increase network capacity and costly on-site infrastructure upgrades motivate infrastructure vendors to invest in other innovative technologies.
  • According to a new report from global technology intelligence firm ABI Research, some revolutionary technologies include Distributed massive Multiple-Input Multiple-Output (mMIMO), Radio Stripes, Holographic Beam Forming (HBF) antennas, pCell technology, Open Radio Access Network (RAN) DASs, and Reconfigurable Intelligent Surfaces (RISs).
  • Among the technologies, Distributed mMIMO, HBF, and pCell are already available and expected to be deployed on a larger scale in 2023.
  • These findings are from ABI Research's Revolutionary Technologies for Indoor Cellular Networks application analysis report.

Primarius Unveils Custom Design Environment, Circuit Simulation and Design Enablement Solutions at DAC

Retrieved on: 
Wednesday, June 29, 2022

SAN JOSE, Calif., June 29, 2022 (GLOBE NEWSWIRE) -- Primarius Technologies will unveil its flexible and scalable design environment for custom memory and analog/mixed-signal IC design and new circuit simulation and design enablement solutions during the Design Automation Conference (DAC) July 11-13 at Moscone Center in San Francisco.

Key Points: 
  • SAN JOSE, Calif., June 29, 2022 (GLOBE NEWSWIRE) -- Primarius Technologies will unveil its flexible and scalable design environment for custom memory and analog/mixed-signal IC design and new circuit simulation and design enablement solutions during the Design Automation Conference (DAC) July 11-13 at Moscone Center in San Francisco.
  • Primarius is committed to delivering innovative data-driven design technology co-optimization (DTCO) EDA solutions powered by leading-edge SPICE/FastSPICE simulation technologies, shortening time to market and improving yield, power, performance and area of circuit designs at advanced process nodes.
  • Its DTCO solutions such as SDEP, PCellLab, NanoCell and FS-Pro reduce the iteration cycle from process technology development to IC design for models, PDKs and standard cell development products available from Primarius.
  • It integrates with NanoSpice, Primarius circuit simulator series that offer the full spectrum of circuit simulation capabilities including high-performance parallel SPICE to an adaptive dual-simulation engine FastSPICE.

Artemis pCell vRAN Leapfrogs Existing 5G Networks with 10 Times More Capacity

Retrieved on: 
Wednesday, May 11, 2022

Artemis Networks today unveiled the pCell Multi-Gigabit LTE/5G vRAN (Virtualized Radio Access Network), which delivers 10x the capacity of conventional LTE/5G networks in the same amount of spectrum.

Key Points: 
  • Artemis Networks today unveiled the pCell Multi-Gigabit LTE/5G vRAN (Virtualized Radio Access Network), which delivers 10x the capacity of conventional LTE/5G networks in the same amount of spectrum.
  • Artemis also announced the first large-scale pCell vRAN installation in SAP Center, a 140,000 sq.
  • The pCell vRAN enables a new era in wireless communications, when fiber-class capacity, uniformity, and reliability are available over the airwaves.
  • Artemis, the Artemis logo, pCell and pWave are registered trademarks of Artemis Networks LLC.

Key Foundry Reinforces Design Support for Fabless Customers

Retrieved on: 
Wednesday, August 11, 2021

SEOUL, South Korea, Aug. 11, 2021 /PRNewswire/ -- Key Foundry, the only pure-play foundry in Korea, announced today that it has developed a customer-friendly semiconductor design support tool named PDK Version E (Process Design Kit, enhanced version), and begun its offering to fabless companies.

Key Points: 
  • SEOUL, South Korea, Aug. 11, 2021 /PRNewswire/ -- Key Foundry, the only pure-play foundry in Korea, announced today that it has developed a customer-friendly semiconductor design support tool named PDK Version E (Process Design Kit, enhanced version), and begun its offering to fabless companies.
  • This database enables customers to create designs that are well-suited for the foundry service provider's fabrication processes and equipment characteristics.
  • Key Foundry has been offering PDKs that support environments of major chip design tool companies such as Synopsys, Cadence, Siemens, etc.
  • "Key Foundry has made years of relentless development and verification efforts to reinforce design support for our fabless customers," said Dr. Tae Jong Lee, CEO of Key Foundry.