Formal equivalence checking

GF and Synopsys Deliver New Reference Flows for GF 22FDX Process: Cloud-Qualified and First Automotive Flow for ASIL-D Designs

Retrieved on: 
Wednesday, September 15, 2021

The automotive reference flow enabling ASIL-D designs on GF's 22FDX process provides designers with a comprehensive solution for functional safety analysis, implementation and verification of ADAS, powertrain, 5G and radar systems.

Key Points: 
  • The automotive reference flow enabling ASIL-D designs on GF's 22FDX process provides designers with a comprehensive solution for functional safety analysis, implementation and verification of ADAS, powertrain, 5G and radar systems.
  • The flow utilizes the Synopsys RTL-to-GDSII native functional safety design implementation solution and DesignWare ARC Processor IP.
  • Avidan also said, "As for automotive designs, the longstanding collaboration between Synopsys and GF has delivered the platform and IP needed for seamless adoption of the 22FDX process for automotive designs.
  • Deploying the industry's first automotive reference flow for 22FDX enables designers to accelerate time to silicon success and meet their stringent ASIL and reliability targets."

Tachyum Nears Design Completion With 99 Percent of Layout Completed

Retrieved on: 
Tuesday, March 16, 2021

Tachyums ability to achieve Prodigys 99 percent completion with a stable netlist layout and Clock Tree Synthesis (CTS) implemented is a last netlist milestone before final netlist and its tape-out.

Key Points: 
  • Tachyums ability to achieve Prodigys 99 percent completion with a stable netlist layout and Clock Tree Synthesis (CTS) implemented is a last netlist milestone before final netlist and its tape-out.
  • Tachyum has successfully compiled its Prodigy design to an FPGA emulation, moving it one step closer to meeting its goal of achieving production later this year.
  • The company also confirmed that Prodigy maintains netlist clock speed targets with no die size growth from its targets to ensure chip stability.
  • The march to 99 percent completion has been reached in leaps and bounds rather than small steps.

OneSpin Participates at Nokia’s Famed FPGA Conference and Hackathon as a Headline Speaker and Verification Solution Provider

Retrieved on: 
Wednesday, November 18, 2020

Hackathon contestants will have access to OneSpins 360 Design Verification solutions to help them achieve success.

Key Points: 
  • Hackathon contestants will have access to OneSpins 360 Design Verification solutions to help them achieve success.
  • They will have access to FPGA design and verification tools like OneSpins 360 Design Verification and Equivalence Checking for FPGAs formal solutions.
  • OneSpin Solutions is a leading provider of certified IC integrity verification solutions for building functionally correct, safe, secure and trusted integrated circuits.
  • OneSpin, OneSpin Solutions and the OneSpin logo are trademarks of OneSpin Solutions GmbH.