5 nm process

Marvell Extends OCTEON Leadership with Industry's First 5nm DPUs

Retrieved on: 
Monday, June 28, 2021
Computer networking, Packet processing, 5 nm process, Computing, Technology, Science and technology

"The OCTEON 10 brings compute leadership, supports networking and security workloads exceeding 400G, and incorporates leading edge I/O including DDR5 and PCIe 5.0."

Key Points: 
  • "The OCTEON 10 brings compute leadership, supports networking and security workloads exceeding 400G, and incorporates leading edge I/O including DDR5 and PCIe 5.0."
  • "We would like to congratulate Marvell on the launch of their industry-leading OCTEON 10 DPU family.
  • "Marvell's OCTEON 10 DPUs offer enhanced packet processing capability for parsing, classification, and inline IPSec," said Daniel Newman, founding partner at Futurum Research.
  • "The combination of leading-edge 5nm technology, Neoverse N2 cores and OCTEON 10 will enable Marvell to take on complex workloads, and showcase its strengths in DPU computing."

Expert optimistic about China's chipmaking industry

Retrieved on: 
Friday, June 25, 2021
Iranian inventions, Inventions, 14 nm process, 5 nm process, MOSFETs, Science and technology, Economies, Integrated circuits

BEIJING, June 25, 2021 /PRNewswire/ -- A news report by China.org.cn on Expert optimistic about China's chipmaking industry.

Key Points: 
  • BEIJING, June 25, 2021 /PRNewswire/ -- A news report by China.org.cn on Expert optimistic about China's chipmaking industry.
  • The development of China's domestic chipmaking industry is looking promising as advanced 28 and 14 nanometer (nm) processes are expected to enter mass production by the end of this year and next year respectively, an expert predicted.
  • Wen Xiaojun, head of the Electronic Information Institute at the China Center for Information Industry Development (CCID), told China's news portal huanqiu.com, that he was seeing more encouraging signs in China's chipmaking industry despite technological challenges.
  • The production lines for 14 nm and 12 nm chipmaking are believed to be critical in the semiconductor industry, as the 14 nm process and above can meet almost 70% of the industry demand for chips, and the 12 nm node can meet the requirements for most mid-end 5G chips.

NXP Ramps Automotive Processing Innovation with Two Processors on TSMC 16nm FinFET Technology

Retrieved on: 
Wednesday, June 2, 2021
5 nm process, 14 nm process, TSMC, Inventions, Companies, Science and technology in Taiwan

The move to TSMCs 16nm technology has allowed S32G2 to consolidate multiple devices into one, creating a powerful System-on-Chip (SoC) that reduces the processors footprint.

Key Points: 
  • The move to TSMCs 16nm technology has allowed S32G2 to consolidate multiple devices into one, creating a powerful System-on-Chip (SoC) that reduces the processors footprint.
  • TSMCs 16nm technology enables NXPs automotive processors to harness the power of advanced FinFET transistors for the first time, combining improved performance and rigorous automotive process qualifications to deliver safe next generation computing power.
  • Backed by TSMCs extensive roadmap for automotive processes, NXPs 16nm automotive processors pave the way for a wider migration to TSMCs 5nm process for the NXP S32 family of vehicle processors.
  • NXPs S32R294 radar processors and S32G2 secure gateway processors have started volume production in Q2 this year and are available.

Tachyum Prodigy has Successfully Transitioned to 5 Nanometer Process

Retrieved on: 
Tuesday, June 1, 2021
Semiconductor, Electronic design automation, Data management, Technology, Software, 5 nm process, 7 nm process, Inventions

Tachyum today announced it has successfully improved performance, density and power consumption of its Prodigy Universal Processor by a process (die) shrink to 5nm (nanometer) feature size from 7nm.

Key Points: 
  • Tachyum today announced it has successfully improved performance, density and power consumption of its Prodigy Universal Processor by a process (die) shrink to 5nm (nanometer) feature size from 7nm.
  • It also enables Tachyum to instantiate 128 cores in a low-cost monolithic die.
  • In addition to the benefits of the process shrink, Tachyum was able to integrate the Synopsys DesignWare IP quickly because Tachyum engaged in Customer Owned Tooling (COT) flow.
  • Scaling the Prodigy Universal Processor to the 5nm process node brings industry-leading performance and power efficiency to the next generation of data center, AI, and HPC workloads, said Dr. Radoslav Danilak, Tachyum founder and CEO.

Cadence Collaboration With Arm Enables Customers to Successfully Tape out Next-Generation Arm Mobile Designs

Retrieved on: 
Tuesday, May 25, 2021
Semiconductor, Hardware, Electronic design automation, Technology, Software, Acorn Computers, Mergers and acquisitions, Companies, Computer architecture, Fabless semiconductor companies, Cadence Design Systems, Arm Ltd., ARM architecture, 5 nm process

Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that through a collaboration with Arm, customers have successfully taped out mobile SoCs using Cadence tools and the next-generation Arm mobile solution, which includes the Arm Cortex-X2, Cortex-A710, and Cortex-A510 CPUs, Mali-G710 GPU and the DynamIQ Shared Unit-110.

Key Points: 
  • Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that through a collaboration with Arm, customers have successfully taped out mobile SoCs using Cadence tools and the next-generation Arm mobile solution, which includes the Arm Cortex-X2, Cortex-A710, and Cortex-A510 CPUs, Mali-G710 GPU and the DynamIQ Shared Unit-110.
  • Cadence delivered a highly tuned digital flow and corresponding 5nm and 7nm RAKs for the development of SoCs based on the latest Arm mobile solution.
  • The Cadence digital full flow enables customers to achieve PPA goals, and the verification full flow provides improved verification throughput.
  • Cadence, the Cadence logo and the other Cadence marks found at www.cadence.com/go/trademarks are trademarks or registered trademarks of Cadence Design Systems, Inc.

SMIC Reports 2021 First Quarter Results

Retrieved on: 
Thursday, May 13, 2021
SMIC, 5 nm process, Micron Technology, 14 nm process, Companies, Semiconductor Manufacturing International Corporation

SMIC Group provides integrated circuit ("IC") foundry and technology services on process nodes from 0.35 micron to 14 nanometer.

Key Points: 
  • SMIC Group provides integrated circuit ("IC") foundry and technology services on process nodes from 0.35 micron to 14 nanometer.
  • Headquartered in Shanghai, China, SMIC Group has an international manufacturing and service base.
  • Other unknown or unpredictable factors also could have material adverse effects on our future results, performance or achievements.
  • In light of these risks, uncertainties, assumptions and factors, the forward-looking events discussed in this release may not occur.

IBM Unveils World's First 2 Nanometer Chip Technology, Opening a New Frontier for Semiconductors

Retrieved on: 
Thursday, May 6, 2021
Inventions, Science and technology, MOSFETs, Digital electronics, Technology, 7 nm process, POWER10, Integrated circuit, 5 nm process

b'ALBANY, N.Y., May 6, 2021 /PRNewswire/ --IBM (NYSE: IBM ) today unveiled a breakthrough in semiconductor design and process with the development of the world\'s first chip announced with 2 nanometer (nm) nanosheet technology.

Key Points: 
  • b'ALBANY, N.Y., May 6, 2021 /PRNewswire/ --IBM (NYSE: IBM ) today unveiled a breakthrough in semiconductor design and process with the development of the world\'s first chip announced with 2 nanometer (nm) nanosheet technology.
  • IBM\'s new 2 nm chip technology helps advance the state-of-the-art in the semiconductor industry, addressing this growing demand.
  • IBM\'s first commercialized offering including IBM Research 7 nm advancements will debut later this year in IBM POWER10 -based IBM Power Systems.\nIncreasing the number of transistors per chip can make them smaller, faster, more reliable, and more efficient.
  • The 2 nm design demonstrates the advanced scaling of semiconductors using IBM\'s nanosheet technology .

Cadence Pegasus Verification System Certified for Samsung Foundry 5nm and 7nm Process Technologies

Retrieved on: 
Monday, April 19, 2021
Electronic design automation, Semiconductor, Technology, Mobile, Wireless, Software, Hardware, Companies, Industry economics), Technology, Electronic design automation, Hardware verification languages, Semiconductor device fabrication, Signoff, 5 nm process, Cadence Design Systems, Samsung Electronics, Process design kit, Verification

b'Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that the Cadence\xc2\xae Pegasus\xe2\x84\xa2 Verification System has achieved certification for Samsung Foundry\xe2\x80\x99s 5nm and 7nm process technologies.

Key Points: 
  • b'Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that the Cadence\xc2\xae Pegasus\xe2\x84\xa2 Verification System has achieved certification for Samsung Foundry\xe2\x80\x99s 5nm and 7nm process technologies.
  • Samsung Foundry also delivered an enhanced, signoff-accurate process design kit (PDK) to facilitate the adoption of the Pegasus Verification System on the Samsung 5nm and 7nm technologies.\nThe Pegasus Verification System offers many advantages for engineers creating designs using Samsung\xe2\x80\x99s advanced nodes.
  • Additionally, the Pegasus Verification System features a tight, interactive integration with the Cadence Virtuoso\xc2\xae Layout Suite environment.
  • For more information on the Pegasus Verification System, please visit www.cadence.com/go/pegasusadvnd .\n\xe2\x80\x9cWe value our collaboration with Cadence and have worked diligently to enable our mutual customers to sign off their designs using the Pegasus Verification System and Samsung Foundry\xe2\x80\x99s advanced-node process technologies,\xe2\x80\x9d said Jong-Wook Kye, vice president of the Design Enablement Team at Samsung Electronics.

OpenFive Tapes Out SoC for Advanced HPC/AI Solutions on TSMC 5nm Technology

Retrieved on: 
Tuesday, April 13, 2021
Electronic design automation, Semiconductor, Technology, Other Technology, Software, Hardware, Fabless semiconductor companies, SiFive, Semiconductor device fabrication, 5 nm process, TSMC, Companies, Industry economics)

The HBM3 interface supports 7.2Gbps speeds allowing high throughput memories to feed domain-specific accelerators in compute-intensive applications including HPC, AI, Networking, and Storage.

Key Points: 
  • The HBM3 interface supports 7.2Gbps speeds allowing high throughput memories to feed domain-specific accelerators in compute-intensive applications including HPC, AI, Networking, and Storage.
  • Combined with OpenFive advanced 2.5D packaging solutions and high performance, low power, and low latency HBM/D2D interface IP, designers can now create systems-on-chip (SoCs) that pack more compute power into smaller form factors for AI and HPC applications.\nThe SiFive E7-Series is a high performance embedded 32-bit processor.
  • The E76 configuration of the E7-Series includes SiFive Insight Trace and Debug technology, which enables core instruction trace streaming off-chip.
  • \xe2\x80\x9cWith the excellent support we received from TSMC, we completed this 5nm tape out in record time, and we are looking forward to enabling chip and system companies to accelerate their designs on TSMC\xe2\x80\x99s leading-edge 5nm technology.\xe2\x80\x9d\nOpenFive\xe2\x80\x99s 5nm silicon solution for HPC/AI, networking and storage solutions is ready for customer design starts.

SiPearl and Open-Silicon Research Collaborate to Accelerate Custom Silicon for High Performance Computing (HPC) Applications

Retrieved on: 
Tuesday, February 23, 2021
Semiconductor, Security, Satellite, Photography, Nanotechnology, Audio, Video, Other Technology, Telecommunications, Software, Networks, Internet, Hardware, Electronic design automation, Data management, Consumer electronics, VoIP, Technology, Mobile, Wireless, Cluster computing, Distributed computing architecture, Parallel computing, Product management, Post-silicon validation, Articles, Supercomputer, 5 nm process, Science and technology, Innovation, Computer architecture, SiPearl, OpenFive

We are confident that this partnership will enable vast opportunities to develop new HPC applications with our mutual customers.

Key Points: 
  • We are confident that this partnership will enable vast opportunities to develop new HPC applications with our mutual customers.
  • This new generation of microprocessors will enable Europe to set out its technological sovereignty on the strategic markets for high performance computing, artificial intelligence and connected mobility.
  • OpenFive offers end-to-end expertise in architecture, design implementation, software, silicon validation and manufacturing to deliver high-quality silicon in advanced nodes down to 5nm.
  • 1 This project has received funding from the European Union's Horizon 2020 research and innovation programme under specific grant agreement no.826647.