Scalar processor

MEDIA ALERT: Join Andes Principle Architect Dr. Thang Tran's Lecture, "Demystifying RISC-V Vector Extension"

Retrieved on: 
Friday, July 9, 2021
Parallel computing, Computer architecture, Computing, Computers, Central processing unit, Classes of computers, Superscalar processor, Vector processor, Scalar processor, FR-V

The hour long event will be the first of a 4-part lecture series on next-generation vector processor design.

Key Points: 
  • The hour long event will be the first of a 4-part lecture series on next-generation vector processor design.
  • It will showcase a 5-stage pipeline and an 8-stage in-order superscalar vector processor based on Andes latest AndeStar V5 Architecture.
  • Who: Dr. Thang Tran, Principal Architect and veteran of high-performance computing (HPC) at Andes Technology Corp. will be the series' presenter.
  • The vector processor issues 8 micro-ops per cycle with up to 14 vector instructions in parallel execution.

SiFive Announces New Technologies for Mission-Critical and AI Markets

Retrieved on: 
Tuesday, December 10, 2019
Computers, Digital technology, Classes of computers, Parallel computing, Computer architecture, SiFive, Microcontrollers, RISC-V, Superscalar processor, Reduced instruction set computer, Multi-core processor, Scalar processor

Recently, SiFive announced the world's first RISC-V out-of-order superscalar processor core IP, SiFive U8-Series , and a whole SoC solution for security, SiFive Shield .

Key Points: 
  • Recently, SiFive announced the world's first RISC-V out-of-order superscalar processor core IP, SiFive U8-Series , and a whole SoC solution for security, SiFive Shield .
  • "SiFive has had a tremendous year in 2019, and the introduction of SiFive Apex and SiFive Intelligence is the crowning achievement," said Dr. Naveed Sherwani, president and CEO of SiFive.
  • Said Lee: "The announcement of SiFive Apex and SiFive Intelligence is a tipping point for SiFive.
  • SiFive Intelligence creates a new level of configurable, scalable CPU that is sorely needed for enabling machine learning and inference processors in AI markets."