Instruction set architecture

RISC-V Processors Addressing Edge AI Devices to Reach 129 Million Shipments by 2030

Retrieved on: 
Wednesday, February 14, 2024
ISA, Architecture, International, Semiconductor, Natural language processing, Intel, Research, AI, NXP Semiconductors, Growth, Original equipment manufacturer, Industry analyst, MediaTek, Android, Machine learning, Ecosystem, RISC, Instruction set architecture, ABI, Artificial intelligence, Robotics, Medical device

LONDON, Feb. 14, 2024 /PRNewswire/ -- Reduced Instruction Set Computing (RISC)-V processor architectures are starting to address edge Artificial Intelligence (AI) workloads, and this trend is set to continue throughout the decade. According to a new report from global technology intelligence firm ABI Research, while RISC-V's penetration into AI workloads is only just beginning, growth will be steady throughout the rest of the decade, pushing RISC-V chip shipments in edge AI (excluding TinyML) to 129 million by 2030.

Key Points: 
  • According to a new report from global technology intelligence firm ABI Research, while RISC-V's penetration into AI workloads is only just beginning, growth will be steady throughout the rest of the decade, pushing RISC-V chip shipments in edge AI (excluding TinyML) to 129 million by 2030.
  • Leading startups, like Axelera AI and Tenstorrent , show RISC-V's potential to address more demanding AI inferencing workloads, like computer vision in automotive and security applications.
  • Legacy players, from Qualcomm to Microchip , also want to develop processors using the Instruction Set Architecture (ISA).
  • A key driver of shipment numbers is edge AI gateways, the bulk of which comprises systems connecting and performing inference on sensors in the home.

RISC-V Processors Addressing Edge AI Devices to Reach 129 Million Shipments by 2030

Retrieved on: 
Wednesday, February 14, 2024
ISA, Architecture, International, Semiconductor, Natural language processing, Intel, Research, AI, NXP Semiconductors, Growth, Original equipment manufacturer, Industry analyst, MediaTek, Android, Machine learning, Ecosystem, RISC, Instruction set architecture, ABI, Artificial intelligence, Robotics, Medical device

LONDON, Feb. 14, 2024 /PRNewswire/ -- Reduced Instruction Set Computing (RISC)-V processor architectures are starting to address edge Artificial Intelligence (AI) workloads, and this trend is set to continue throughout the decade. According to a new report from global technology intelligence firm ABI Research, while RISC-V's penetration into AI workloads is only just beginning, growth will be steady throughout the rest of the decade, pushing RISC-V chip shipments in edge AI (excluding TinyML) to 129 million by 2030.

Key Points: 
  • According to a new report from global technology intelligence firm ABI Research, while RISC-V's penetration into AI workloads is only just beginning, growth will be steady throughout the rest of the decade, pushing RISC-V chip shipments in edge AI (excluding TinyML) to 129 million by 2030.
  • Leading startups, like Axelera AI and Tenstorrent , show RISC-V's potential to address more demanding AI inferencing workloads, like computer vision in automotive and security applications.
  • Legacy players, from Qualcomm to Microchip , also want to develop processors using the Instruction Set Architecture (ISA).
  • A key driver of shipment numbers is edge AI gateways, the bulk of which comprises systems connecting and performing inference on sensors in the home.

WITTENSTEIN high integrity systems Have Joined The RISC-V Foundation

Retrieved on: 
Tuesday, January 9, 2024
Instruction set architecture, Real, DAP, Architecture, ISA, Safety, Strategy, WHIS

BRISTOL, England, Jan. 9, 2024 /PRNewswire-PRWeb/ -- WITTENSTEIN high integrity systems is proud to announce they have joined the RISC-V Foundation as a Strategic Member. The seamless integration of SAFERTOS for the RISC-V architecture provides an exceptional foundation for your safety-critical endeavours, paving the way for innovation.

Key Points: 
  • WITTENSTEIN High Integrity Systems (WHIS) proudly announces its strategic membership with the RISC-V Foundation, a significant milestone in our commitment to cutting-edge technology.
  • BRISTOL, England, Jan. 9, 2024 /PRNewswire-PRWeb/ -- WITTENSTEIN high integrity systems is proud to announce they have joined the RISC-V Foundation as a Strategic Member.
  • The seamless integration of SAFERTOS for the RISC-V architecture provides an exceptional foundation for your safety-critical endeavours, paving the way for innovation.
  • "We're proud to be Strategic Members of the RISC-V Foundation," said Andrew Longhurst, Managing Director for WITTENSTEIN high integrity systems.

Ambient Scientific's Edge AI Processor goes into volume production

Retrieved on: 
Thursday, January 4, 2024
Software development kit, Health, ECG, ISA, Microelectromechanical systems, Instruction set architecture, Business, TSMC, Evaluation, Sensor, Multichannel, AI, Internet, Cloud computing, ADC, Video game

SANTA CLARA, Calif., Jan. 4, 2024 /PRNewswire/ -- Ambient Scientific, The AI Processor Company, announced today that its first AI SoC – GPX10 – designed to run cloud-free AI applications on portable battery-powered devices has gone into volume production. GPX-10 is manufactured at TSMC using 40 nm technology. The product has a complete development platform to enable On-Device/IoT AI Applications, that includes a Software Development Kit with Neural Network Compiler. The Evaluation kit is available for commercial purchase starting Q1 2024.

Key Points: 
  • SANTA CLARA, Calif., Jan. 4, 2024 /PRNewswire/ -- Ambient Scientific, The AI Processor Company, announced today that its first AI SoC – GPX10 – designed to run cloud-free AI applications on portable battery-powered devices has gone into volume production.
  • The product has a complete development platform to enable On-Device/IoT AI Applications, that includes a Software Development Kit with Neural Network Compiler.
  • The team at Ambient Scientific is eager to discover how the industry develops innovative and useful products over time, using its edge AI development platform with GPX-10 AI processor.
  • With its first product getting into volume production for market availability in Q1 2024, Ambient Scientific is executing on its plan to develop newer products to realize its mission of democratizing sustainable AI for the betterment of all human lives.

ASUS IoT Announces Tinker V

Retrieved on: 
Tuesday, March 14, 2023
Renesas Electronics, SBC, Longevity, Andes Technology, ASUS, GPIO, RAM, Architecture, Debian, RISC, Artificial intelligence of things, Instruction set architecture, MPU, ISA, Tinker v. Des Moines Independent Community School District, RS232, Arm, COM, Video game, Tinker, Internet of things, Metric prefix

First ASUS IoT RISC-V SBC: 64-bit processor embraces open-source RISC-V architecture to deepen diversity and flexibility for IoT developers

Key Points: 
  • First ASUS IoT RISC-V SBC: 64-bit processor embraces open-source RISC-V architecture to deepen diversity and flexibility for IoT developers
    Ideal for industrial IoT: Linux Debian and Yocto support, rich connectivity, assured longevity and reliable, trusted technical support
    TAIPEI, Taiwan, March 14, 2023 — ASUS IoT, the global AIoT solution provider, today announced the all-new Tinker V — a versatile single-board computer (SBC) powered by a 64-bit RISC-V-based processor, which supports both Linux Debian and Yocto operating systems.
  • The launch of Tinker V, based on RISC-V, represents ASUS IoT’s ongoing commitment to accelerating IoT technologies, providing convenient and efficient environments for people everywhere.
  • ASUS has been instrumental in integrating our device in the Tinker V SBC and we look forward to introducing more comprehensive RISC-V-based MPU solutions to our customers through our collaboration.”
    Dr. Charlie Su, President and CTO of Andes Technology, added: “Andes has collaborated with ​​ASUS IoT for the exciting Tinker V product.
  • ASUS IoT Tinker V samples will be available in Q2.

Smaller Code, Higher Performance: Latest IAR Embedded Workbench for RISC-V Leverages CoDense™ from Andes

Retrieved on: 
Wednesday, November 16, 2022
Electronic Design Automation, Data Management, Semiconductor, Security, Technology, Other Technology, Software, Symmetric multiprocessing, MCU, CERT, Visual Studio Code, Asymmetric, Software, MISRA C, SME, Andes Technology, Developer, Arm, Symmetry, IAR, IAR Systems, The Hepatitis C Trust, Name, Certification, MISRA, AMP, ISA, Socs, SMP, Safety, Common Weakness Enumeration, Instruction set architecture, Trace, Coremark, CWE, IOT, Architecture, Video game console

IAR Systems, the world leader in software and services for embedded development, has just announced the full support of their latest release of IAR Embedded Workbench for RISC-V for the CoDense extension of Andes Technologys AndeStar V5 RISC-V processor.

Key Points: 
  • IAR Systems, the world leader in software and services for embedded development, has just announced the full support of their latest release of IAR Embedded Workbench for RISC-V for the CoDense extension of Andes Technologys AndeStar V5 RISC-V processor.
  • Andes is a founding Premier member of RISC-V International and a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions.
  • For more information on the IAR Embedded Workbench for RISC-V, the functional safety-certified edition of the tool suite, and IAR Systems overall offering for RISC-V, please visit https://www.iar.com/riscv .
  • Editor's Note: IAR Systems, IAR Embedded Workbench, Embedded Trust, C-Trust, C-SPY, C-RUN, C-STAT, IAR Visual State, I-jet, I-jet Trace, IAR Academy, IAR, and the logotype of IAR Systems are trademarks or registered trademarks owned by IAR Systems AB.

AlphaICs Begins Global Sampling of 'Gluon - Deep Learning Co-Processor' for Vision AI With Superior FPS/Watt Performance

Retrieved on: 
Monday, February 14, 2022
TSMC, Silicon, AI, Architecture, CBC, Software development kit, DRAM, GLOBE, AlphaIC, Original equipment manufacturer, Technology, PCI Express, Real, SDK, Industrial, Classification, Engineering, FPS, X86, Deep learning, Instruction set architecture, Industry, Video game console, Textile, Video game, LPDDR4, Gluon

Gluon was showcased at Japan AI Expo in October 2021 and generated great interest from Japanese customers for vision applications based on its superior performance.

Key Points: 
  • Gluon was showcased at Japan AI Expo in October 2021 and generated great interest from Japanese customers for vision applications based on its superior performance.
  • Gluon is future-ready and is well-positioned to address the AI vision applications for surveillance, retail, industrial, and smart city markets."
  • This chip accelerates Deep Learning Neural Network models for classification, detection, and segmentation and is focused on vision applications.
  • AlphaICs is a leading AI technology company that develops edge inference and edge learning technologies to enable AI at the edge.

WideOrbit Partners With ITN Networks to Automate Exchange of Electronic Material Instructions

Retrieved on: 
Wednesday, February 24, 2021
ITV, Daily Mail and General Trust, ITN, Informa, Instruction set architecture, Mass media in the United Kingdom

Automated, direct communication of Electronic Material Instructions is a critical component of streamlining TV operations for changing TV content.

Key Points: 
  • Automated, direct communication of Electronic Material Instructions is a critical component of streamlining TV operations for changing TV content.
  • The partnership addresses a critical problem in broadcast operations the exceedingly complex process of exchanging new and revised material instructions between buyers and sellers.
  • With no manual effort required, electronic material instructions are ingested and transposed directly from ITN's systems into the Electronic Material Instructions module for WO Traffic or WO Network, where station users can access all trafficking information and deliver return confirmation directly from within the WideOrbit interface.
  • "The increasing complexity of today's media landscape makes this especially critical and our integration with ITN provides local broadcasters and national networks essential access to accurate, timely material instructions data."

Worldwide Work Instruction Software Industry to 2027 - Constantly Changing Business and Production Complexities Presents Opportunities - ResearchAndMarkets.com

Retrieved on: 
Wednesday, February 3, 2021
Technology, Software, Computer science, Software, Instruction set architecture

North America dominated the work instruction software market in 2019 with a share of 34.6%.

Key Points: 
  • North America dominated the work instruction software market in 2019 with a share of 34.6%.
  • This software also enables employees to self-train themselves with the help of on-screen instructions provided through the software.
  • In 2019, Europe stood second in the work instruction software market with a decent market share, and it is anticipated to witness a decent CAGR from 2020 to 2027.
  • The key findings and recommendations highlight crucial progressive industry trends in the work instruction software market, thereby allowing players to develop effective long-term strategies.

Menta and Andes Announce Partnership Enabling Hardware Reconfiguring for ISA Extension

Retrieved on: 
Monday, December 7, 2020
Instruction set architectures, Computer architecture, Microprocessors, Computing, Embedded microprocessors, Classes of computers, Microcontrollers, RISC-V, Reduced instruction set computer, Instruction set architecture, Arc, SuperH

Andes is working with Menta to enable embedded programmable logic through eFPGA in its RISC-V AndesCore families.

Key Points: 
  • Andes is working with Menta to enable embedded programmable logic through eFPGA in its RISC-V AndesCore families.
  • Menta and Andes share the same vision, providing customers with a joint solution that allows instruction set architecture (ISA) extension to be added or changed in the field.
  • Extending RISC-V ISA with custom instruction set extension, based on eFPGA co-extended core, is the key differentiator for the next processor units generation.
  • It is an honour for Menta to work in close partnership with Andes Technology Corporation, said Menta Chief Executive Officer Vincent Markus.