Aldec

Aldec Releases Automated Static Linting and CDC Analysis for Microchip FPGA and SoC FPGA Designs

Retrieved on: 
Monday, February 6, 2023

The new release supports automatic conversion of Libero projects into ALINT-PRO’s environment for static linting and clock domain crossing (CDC) analysis of hardware designs in VHDL, Verilog or SystemVerilog.

Key Points: 
  • The new release supports automatic conversion of Libero projects into ALINT-PRO’s environment for static linting and clock domain crossing (CDC) analysis of hardware designs in VHDL, Verilog or SystemVerilog.
  • CDC analysis is critical to designs with multiple asynchronous clocks and helps mitigate non-deterministic issues such as data incoherence as a result of metastability that inevitably appear in today’s large FPGA and SoC FPGA designs.
  • “The use of advanced verification tools such as static linting and CDC analysis can significantly reduce the number of non-trivial bugs escaping into production, save engineering resource and more importantly, increase the reliability of FPGA and SoC FPGA designs,” said Louie De Luna, Director of Marketing at Aldec.
  • “Designers using Libero SoC Design Suite can take advantage of Aldec’s ALINT-PRO to help detect functional errors earlier in the FPGA design cycle.”
    In conjunction with the latest release of ALINT-PRO, Aldec and Microchip will be conducting a webinar that will be held on March 2, 2023 - Linting and CDC Analysis for Microchip FPGA Designs .

Achronix Announces Speedster7t AC7t1500 FPGA General Availability

Retrieved on: 
Thursday, December 22, 2022

SANTA CLARA, Calif., Dec. 22, 2022 /PRNewswire/ -- In a continuing commitment to enabling industry-leading data acceleration in heterogeneous compute environments, Achronix Semiconductor Corporation, the industry's only independent supplier of high-end FPGAs and eFPGA IP solutions, today announced the production release of its AC7t1500 FPGA and the addition of the power-efficient AC7t800 FPGA to the Achronix Tool Suite.

Key Points: 
  • The production release of the Speedster7t AC7t1500 and the availability of Speedster7t AC7t800 in the Achronix Tool Suite reiterates Achronix's continued dedication to high-performance FPGAs.
  • "The Speedster®7t product family offers unprecedented FPGA-based performance for data acceleration applications," said Steve Mensor, VP of Marketing and Business Development at Achronix.
  • Standard RTL (VHDL and Verilog) input together with industry-standard simulation ensures that the Achronix design flow is straightforward for existing FPGA designers.
  • Achronix Speedster®7t FPGA and Speedcore™ eFPGA IP offerings are further enhanced by ready-to-use VectorPath® accelerator cards targeting AI, machine learning, networking and data center applications.

Electronic Design Automation Market to Record 10.86% Y-O-Y Growth Rate in 2021 | Agnisys Inc., Aldec Inc., and ANSYS Inc. emerge as dominant players | Technavio

Retrieved on: 
Friday, December 17, 2021

The increase in electronic device manufacturing will drive the growth of the electronic design automation market in APAC.

Key Points: 
  • The increase in electronic device manufacturing will drive the growth of the electronic design automation market in APAC.
  • Electronic Design Automation Market Driver:
    Growing significance of electronic design automation in the electronic design process:
    The global growth in the demand for electronic products has consequently fueled the semiconductor market growth.
  • Electronic Design Automation Market Challenge:
    High dependency on semiconductors and electronics markets:
    Most of the growth in the electronic design automation market is highly dependent on the semiconductor and electronics industry.
  • Many such factors are expected to reduce the growth potential in the global electronic design automation market.

Hardware Assisted Verification Market to hit $1.5 Bn by 2027, Says Global Market Insights Inc.

Retrieved on: 
Monday, October 25, 2021

The hardware assisted verification market is expected to surpass USD 1.5 billion by 2027, as reported in a research study by Global Market Insights Inc .

Key Points: 
  • The hardware assisted verification market is expected to surpass USD 1.5 billion by 2027, as reported in a research study by Global Market Insights Inc .
  • Rapid industrialization in European countries, such as the UK, Germany, and France, will provide ample opportunities for the hardware assisted market.
  • Some major findings in the Hardware Assisted Verification (HAV) market report include:
    New design architectures & capabilities and simplified usage have eased and facilitated the deployment of hardware assisted verification platforms across all the segments of the semiconductor industry.
  • Global Market Insights Inc., headquartered in Delaware, U.S., is a global market research and consulting service provider, offering syndicated and custom research reports along with growth consulting services.

Hardware Assisted Verification Market to hit $1.5 Bn by 2027, Says Global Market Insights Inc.

Retrieved on: 
Monday, October 25, 2021

The hardware assisted verification market is expected to surpass USD 1.5 billion by 2027, as reported in a research study by Global Market Insights Inc .

Key Points: 
  • The hardware assisted verification market is expected to surpass USD 1.5 billion by 2027, as reported in a research study by Global Market Insights Inc .
  • Rapid industrialization in European countries, such as the UK, Germany, and France, will provide ample opportunities for the hardware assisted market.
  • Some major findings in the Hardware Assisted Verification (HAV) market report include:
    New design architectures & capabilities and simplified usage have eased and facilitated the deployment of hardware assisted verification platforms across all the segments of the semiconductor industry.
  • Global Market Insights Inc., headquartered in Delaware, U.S., is a global market research and consulting service provider, offering syndicated and custom research reports along with growth consulting services.

Sigasi Transforms Design Development with Visual Studio Code Extension

Retrieved on: 
Monday, September 20, 2021

Sigasi , the leading developer of hardware description language (HDL) design solutions, today announced the availability of its Visual Studio Code (VS Code) Extension , a transformative innovation for interacting with HDL source code.

Key Points: 
  • Sigasi , the leading developer of hardware description language (HDL) design solutions, today announced the availability of its Visual Studio Code (VS Code) Extension , a transformative innovation for interacting with HDL source code.
  • VS Code combines the simplicity of a source code editor with powerful developer tooling such as smart code completion, navigation, and type time code feedback.
  • Sigasi Studio, the companys flagship product, is an intelligent design creation solution that features advanced programming assistance for hardware design teams.
  • Sigasi Studio provides design teams with interfaces to the most popular EDA design tools with automated compilation and simulation.

New TySOM-M Series Targets Low Power, High Security Applications

Retrieved on: 
Wednesday, July 7, 2021

Microchips PolarFire SoC FPGA boasts low power consumption, impressive thermal efficiency and defense-grade security for smart, connected systems.

Key Points: 
  • Microchips PolarFire SoC FPGA boasts low power consumption, impressive thermal efficiency and defense-grade security for smart, connected systems.
  • The RISC-V CPU micro-architecture implementation in the PolarFire SoC MPFS250T-FCG1152 is a five-stage single issue in-order pipeline.
  • The five cores are 1x SiFive E51 Monitor core (RV64IMAC) and 4x SiFive U54 Application cores (RV64GC).
  • Aldecs decision to use PolarFire SoC FPGA in its new TySOM-M family will enable users to design for a wealth of applications requiring low power and high security.

Corigine Delivers a Next-Generation Prototyping System for ASIC and Pre-Silicon Software Development

Retrieved on: 
Tuesday, July 6, 2021

The Corigine prototyping solution delivers an unprecedented level of automation and performance for FPGA based prototyping, accelerating silicon verification and pre-silicon software development at semiconductor companies.

Key Points: 
  • The Corigine prototyping solution delivers an unprecedented level of automation and performance for FPGA based prototyping, accelerating silicon verification and pre-silicon software development at semiconductor companies.
  • "We are delighted to ship MimicPro production systems to customers," said Corigine CEO Sheng Lu, "The Corigine MimicPro system has opened the flood gates to a marvelous new level of functionality for standalone prototyping, making it available for every validation and software engineering desktop.
  • The Corigine MimicPro system functionality includes automated partitioning with system-level view for optimal performance.
  • Corigine is a fabless semiconductor company that designs and delivers leading edge I/O and networking products, IPs and EDA solutions.

SmartDV Joins the Xilinx Partner Program

SAN JOSE, Calif., June 17, 2021 (GLOBE NEWSWIRE) -- SmartDV Technologies , the leader in Design and Verification Intellectual Property (IP), today confirmed it is a member of the Xilinx Partner Program and offers Design IP optimized for use on Xilinx FPGAs.

Key Points: 
  • SAN JOSE, Calif., June 17, 2021 (GLOBE NEWSWIRE) -- SmartDV Technologies , the leader in Design and Verification Intellectual Property (IP), today confirmed it is a member of the Xilinx Partner Program and offers Design IP optimized for use on Xilinx FPGAs.
  • The Xilinx Partner Program is a worldwide ecosystem of qualified companies that offer acceleration solutions, IP cores, design services, and board development and production.
  • By joining the Xilinx Partner Program, SmartDV is making its Xilinx-compliant Design IP portfolio accessible to customers for use on Xilinx FPGAs.
  • Additionally, all of SmartDVs Design IP portfolio is hardware validated on Xilinx FPGAs.

Aldec Launches HES-DVM Proto ‘Cloud Edition’ - Giving Engineers Easier Access to FPGA-based ASIC & SoC Prototyping

Retrieved on: 
Wednesday, June 2, 2021

Aldec, Inc., a pioneer in mixed HDL language simulation and hardware-assisted verification for FPGA and ASIC designs, has launched HES-DVM Proto Cloud Edition (CE).

Key Points: 
  • Aldec, Inc., a pioneer in mixed HDL language simulation and hardware-assisted verification for FPGA and ASIC designs, has launched HES-DVM Proto Cloud Edition (CE).
  • Aldec launches HES-DVM Proto Cloud Edition (CE).
  • HES-DVM Proto CE is the Cloud Edition of HES-DVM software product used for design compilation and partitioning into multi-FPGA prototyping platforms.
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