Hyperscale computing

Microsoft Joins the LoRa Alliance Board of Directors

Retrieved on: 
Wednesday, September 15, 2021
Semiconductor, Technology, Mobile, Wireless, Telecommunications, Networks, Internet, Cloud, Association, FM, CEO, Semtech, LPWAN, Ecosystem, MyDevice, Microsoft Power Platform, BT, View, Humidity, CIO, Beyond Eyes, Soil, Digital twin, Solution, Collection, Hyperscale computing, Intelligence, Farm, Time, Water, Alliance, AI, EC, PH, Neuro, Engineering, Light, Organization, Time series, Agriculture, Internet of things, Microsoft, Teaching hospital, Royal Hospital, Microsoft Azure, Industrial, Digital transformation, IOT, Azure Stream Analytics, Natural Resources, Royal Hospital for Neuro-disability, Maintenance, Technology, CO2, MSM, Industry, Environment, Multimedia, Temperature, Partnership, Databricks, Airline, Online shopping, Renewable energy, Video game console

The LoRa Alliance , the global association of companies backing the open LoRaWAN standard for the Internet of Things (IoT) low-power wide-area networks (LPWANs), today announced that Tony Shakib, general manager/partner of Azure IoT Engineering at Microsoft, has joined the LoRa Alliance board of directors.

Key Points: 
  • The LoRa Alliance , the global association of companies backing the open LoRaWAN standard for the Internet of Things (IoT) low-power wide-area networks (LPWANs), today announced that Tony Shakib, general manager/partner of Azure IoT Engineering at Microsoft, has joined the LoRa Alliance board of directors.
  • View the full release here: https://www.businesswire.com/news/home/20210915005204/en/
    Tony Shakib, general manager/partner of Azure IoT Engineering at Microsoft, has joined the LoRa Alliance board of directors.
  • (Photo: Business Wire)
    Having Tony join the LoRa Alliance leadership will further accelerate market adoption of the LoRaWAN standard, said Donna Moore, CEO and chairwoman of the LoRa Alliance.
  • Microsoft has already worked with a number of LoRa Alliance members to deploy LoRaWAN solutions globally on the Azure IoT infrastructure.

UpperEdge Compares Options for SAP Customers to Migrate to the Cloud

Retrieved on: 
Tuesday, September 14, 2021
Cloud, Microsoft, SAP, Program, Movement, SAP Cloud Platform, RISE, Microsoft Azure, SI, GCP, Azure, Solution, Hyperscale computing, Partnership, AWS, Organization, Maple syrup, Software, Risk management

The movement to the cloud is driven by a combination of factors, including:

Key Points: 
  • The movement to the cloud is driven by a combination of factors, including:
    A desire to move away from monolithic managed services agreements.
  • This will enable and not distract the decision-making process," said Len Riley, Commercial Advisory Practice Leader at UpperEdge.
  • "Options include SAP RISE, going direct with a hyperscaler, bundled SI solutions and other multi-sourced vendor scenarios.
  • Current market dynamics are encouraging the consideration of these options but overwhelming the companies evaluating them," Riley added.

Cadence Accelerates Intelligent SoC Development with Comprehensive On-Device Tensilica AI Platform

Retrieved on: 
Monday, September 13, 2021
Technology, Semiconductor, Security, Software, Networks, Internet, Hardware, Electronic Design Automation, Data Management, TensorFlow, Intelligent system, NNA, LSTM, AI, Efficiency, PyTorch, SOC, Environment, ISA, NXP, IOT, IP Group, Software, Nasdaq, Cadence Design Systems, GOPS, PPA, NNE, CDNS, MCU, Hyperscale computing, IP, Solution, Internet, TOPS, ONNX, Multimedia, Align Technology, Memory, Apache MXNet, Fortune, Machine learning, DSP, Life, High fidelity, High society, Copper, Mobile phone, Medical device

Cadence Design Systems, Inc. (Nasdaq: CDNS) today unveiled its Tensilica AI Platform for accelerating AI SoC development, including three supporting product families optimized for varying data and on-device AI requirements.

Key Points: 
  • Cadence Design Systems, Inc. (Nasdaq: CDNS) today unveiled its Tensilica AI Platform for accelerating AI SoC development, including three supporting product families optimized for varying data and on-device AI requirements.
  • Spanning the low, mid and high end, the comprehensive Cadence Tensilica AI Platform delivers scalable and energy-efficient on-device to edge AI processing, which is key to todays increasingly ubiquitous AI SoCs.
  • View the full release here: https://www.businesswire.com/news/home/20210913005259/en/
    The comprehensive Cadence Tensilica AI Platform delivers scalable and energy-efficient on-device to edge AI processing, which is key to todays increasingly ubiquitous AI SoCs in the consumer, mobile, automotive and industrial markets.
  • With our mature, extensible and configurable platform based on our best-in-class Tensilica DSPs and featuring common AI software, Cadence allows AI SoC developers to minimize development costs and meet tight market windows.

Cadence and Samsung Accelerate 3nm Mixed-Signal Silicon

Retrieved on: 
Wednesday, September 8, 2021
Electronic Design Automation, Semiconductor, Consumer Electronics, Technology, Software, Hardware

Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that it has collaborated with Samsung Foundry to deliver qualified Mixed-Signal OpenAccess-ready process design kit (PDK) technology files that support a range of Samsung process technologies from 28FDS to GAA base 3nm.

Key Points: 
  • Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that it has collaborated with Samsung Foundry to deliver qualified Mixed-Signal OpenAccess-ready process design kit (PDK) technology files that support a range of Samsung process technologies from 28FDS to GAA base 3nm.
  • The Cadence digital and custom flow supports the Cadence Intelligent System Design strategy, enabling customers to achieve system-on-chip (SoC) design excellence.
  • To learn more about the Cadence Mixed-Signal OpenAccess PDK for Samsung technology, visit www.cadence.com/go/Samsung3nmMS .
  • Cadence, the Cadence logo and the other Cadence marks found at www.cadence.com/go/trademarks are trademarks or registered trademarks of Cadence Design Systems, Inc. All other trademarks are the property of their respective owners.

Cadence’s Anirudh Devgan and John Wall to Present at the D.A. Davidson Software & Internet Conference

Retrieved on: 
Thursday, September 2, 2021
Semiconductor, Hardware, Electronic Design Automation, Technology, Software, Hyperscale computing, CDNS, Conference, Nasdaq, EDT, View, PDT, Webcast, Fortune (magazine), Devgan, Cadence Design Systems, Wall, IP, Intelligent system

Anirudh Devgan, president, and John Wall, senior vice president and chief financial officer, Cadence Design Systems, Inc. (Nasdaq: CDNS).

Key Points: 
  • Anirudh Devgan, president, and John Wall, senior vice president and chief financial officer, Cadence Design Systems, Inc. (Nasdaq: CDNS).
  • Devgan and Wall will participate in a virtual fireside chat at the D.A.
  • Davidson Software & Internet Conference on September 9, 2021.
  • Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise.

Spectra7 Announces Second Quarter Revenue up 185% Year-Over-Year

Retrieved on: 
Monday, August 30, 2021
Hyperscale computing, Company, Canadian Securities Administrators, Texas, CDN, International Financial Reporting Standards, Service, Original equipment manufacturer, ACC, Analysis, Engineering, Conversation, International, The Company, Research, Q3, Marketing, TSX Venture Exchange, Awareness, Electronics, Risk, IFRS, Management, Goal, SEDAR, Solution, SAN, PAM4, Depreciation, Virtual reality, Sale, Novation Companies, EBIDTA, Mission statement, EBITDA, MD, Cryptocurrency, Animal, Video game, Printed circuit board, Security (finance), Bookkeeping

SAN JOSE, Calif., Aug. 30, 2021 /PRNewswire/ -- (TSXV:SEV) (OTCQB:SPVND) Spectra7 Microsystems Inc. ("Spectra7" or the "Company"), a leading provider of high-performance analog semiconductor products for broadband connectivity markets, today announced financial results for its second quarter of 2021. A copy of the unaudited interim consolidated financial statements for the three- and six-month periods ended June 30, 2021, prepared in accordance with International Financial Reporting Standards (IFRS), and the corresponding management's discussion and analysis (MD&A) will be available under the Company's profile on the Canadian Securities Administrator's SEDAR website at www.sedar.com. All amounts reported are in U.S. dollars unless otherwise noted.

Key Points: 
  • Revenue for Q2 2021 was $0.73 million, representing an increase of approximately 30% from Q1 2021, and an increase of approximately 185% over the second quarter of the prior year.
  • Gross margin1 as a percentage of revenue for Q2 2021 was 59%, representing an increase of approximately 2% over the prior quarter, and an increase of 3% over the second quarter of the prior year.
  • Led by strong data center order backlog and supply availability, the Company expects continued revenue growth for the second half of 2021.
  • Spectra7 currently estimates total revenue in the second half of 2021 will be between $4.0 million and $5.0 million, with sequential increases in both Q3 and Q44.

Synopsys Enables First-Pass Silicon Success for Achronix's New FPGA for Data and AI Acceleration Applications

Retrieved on: 
Tuesday, August 24, 2021
Growth, Silicon, Efficiency, Internet, MLP, VCS, Nasdaq, RAS, Marketing, Time, Spyglass, Computer, PCI Express, Solution, VC, FPGA, Hyperscale computing, IP, SNPS, 1T-SRAM, Medical device, Computer data storage

Achronix selected Synopsys to meet the high-bandwidth and artificial intelligence/machine learning (AI/ML) workload requirements of its high-performance computing FPGA design while accelerating time-to-market.

Key Points: 
  • Achronix selected Synopsys to meet the high-bandwidth and artificial intelligence/machine learning (AI/ML) workload requirements of its high-performance computing FPGA design while accelerating time-to-market.
  • "Achronix's new 7-nm Speedster7t FPGA supports the massive amounts of data processing required for high-performance applications," said Chris Pelosi, Achronix VP of Hardware Engineering.
  • Additionally, we accelerated our schedule by months due to the easy integration of the high-quality Synopsys DesignWare IP.
  • The Synopsys DesignWare IP portfolio helped Achronix meet the Speedster7t FPGA's memory performance and real-time data connectivity requirements.

Picocom Accelerates 5G Communications SoC Development with Cadence Palladium Emulation

Retrieved on: 
Wednesday, August 18, 2021
Semiconductor, Hardware, Electronic Design Automation, Technology, Software, Cadence Design Systems, RAN, SOC, Hyperscale computing, Silicon, USB, Efficiency, Nasdaq, USB 3.0, Time, Intelligent system, PCI Express, PCI-SIG, RTL, PCI, CDNS, IP, View, DPA, Fortune, Video game console

Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that Picocom has deployed the Cadence Palladium Enterprise Emulation Platform to accelerate the verification and pre-silicon software validation of its system-on-chip (SoC) designs for 5G open radio access network (RAN) applications.

Key Points: 
  • Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that Picocom has deployed the Cadence Palladium Enterprise Emulation Platform to accelerate the verification and pre-silicon software validation of its system-on-chip (SoC) designs for 5G open radio access network (RAN) applications.
  • Using the Palladium emulation platform, Picocom achieved faster hardware and software integration, experiencing an emulation speedup of 1000X when compared with RTL simulation.
  • The Palladium emulation platform gave Picocom the ability to bring up system software on RISC-V cores in advance of silicon being available.
  • Using the Palladium emulation platform, Picocom took advantage of fast, predictable compile and was able to quickly debug its design.

Maxim Integrated's Multi-Phase AI Power Chipset Delivers Industry's Highest Efficiency and Smallest Total Solution Size

Retrieved on: 
Wednesday, August 18, 2021
Cloud, Graphics processing unit, IOT, Xpu Há, Ownership, Bio-FET, ICS, Efficiency, Power, OAM, Maxim Integrated, Maxim, Cloud computing, AI, Deep learning, PCI Express, NASDAQ, BOM, Solution, SAN, Field-programmable gate array, Application-specific integrated circuit, Hyperscale computing, Data center, Health, Electric motor, Online shopping, Tourism, Transformer, Publishing

It also allows 40 percent less output capacitance compared to competitive solutions, reducing total solution size and capacitor count.

Key Points: 
  • It also allows 40 percent less output capacitance compared to competitive solutions, reducing total solution size and capacitor count.
  • The chipset provides a scalable solution for various output current requirements and is customizable to support multiple form factors.
  • This chipset enables the smallest total solution size and allows developers to reduce component count and bill-of-materials (BOM) costs.
  • "This multi-phase AI power chipset by Maxim Integrated powers AI hardware accelerators such as GPUs, FPGAs, ASICs and xPUs to increase solution efficiency and reduce solution size for different form factors such as PCIe and OAM."

Tower Semiconductor and Cadence Announce New Reference Flow for Advanced 5G Communications and Automotive IC Development

Retrieved on: 
Monday, August 16, 2021
Kurdistan, NASDAQ, Custom, RF CMOS, Intelligent system, Fortune, High-pass filter, SOI, Silicon-germanium, TASE, EM, SAN, ICS, Hyperscale computing, SP4T, VLSI, Partnership, IP, RF, Tower Semiconductor, BiCMOS, IDMS, Technology, Cadence Design Systems, CDNS, MEMS, CMOS, Nasdaq, Virtuoso, BCD, Solution, Mobile phone

The reference design flow provides a faster path to design closure for advanced 5G wireless, wireline infrastructure, and automotive IC product development.

Key Points: 
  • The reference design flow provides a faster path to design closure for advanced 5G wireless, wireline infrastructure, and automotive IC product development.
  • Our ongoing partnership with Tower has generated yet another highly beneficial solution, enabling advanced IC design, which meets the requirements of todays most complex systems.
  • Cadence and Tower customers benefit from an integrated workflow using an all-Cadence toolset and a Tower reference design to rapidly develop compelling products.
  • Cadence, the Cadence logo, and the other Cadence marks found at www.cadence.com/go/trademarks are trademarks or registered trademarks of Cadence Design Systems, Inc. All other trademarks are the property of their respective owners.