Andes Technology

TASKING and Andes announce FuSa compliant Compiler support for Andes RISC-V ASIL Compliant Automotive IP

Retrieved on: 
Wednesday, March 27, 2024

Munich, Germany, March 27, 2024 (GLOBE NEWSWIRE) -- TASKING proudly announces that its ISO 26262 (functional safety) and ISO/SAE 21434 (cybersecurity) compliant compilers now fully support the Andes FuSa certified RISC-V IP.

Key Points: 
  • Munich, Germany, March 27, 2024 (GLOBE NEWSWIRE) -- TASKING proudly announces that its ISO 26262 (functional safety) and ISO/SAE 21434 (cybersecurity) compliant compilers now fully support the Andes FuSa certified RISC-V IP.
  • The newly introduced RISC-V compiler, compliant with ASIL D standards, seamlessly supports both current and forthcoming FuSa certified Andes RISC-V cores.
  • These advancements underscore Andes' ability to provide tailored solutions for diverse automotive applications, highlighting its leading expertise in the automotive RISC-V IP market.
  • Leveraging TASKING's advanced FuSa and Cybersecurity processes, our users can fast-track compliance efforts, accelerating the time-to-market of RISC-V based automotive software solutions."

Seven Years of Uninterrupted Growth: Andes Technology Achieves Milestone Annual Revenue Exceeding NT$1 Billion

Retrieved on: 
Thursday, March 21, 2024

Andes has invested capital and R&D manpower to accelerate the launch of high-end products to ensure long-term competitiveness and maintain market leadership.

Key Points: 
  • Andes has invested capital and R&D manpower to accelerate the launch of high-end products to ensure long-term competitiveness and maintain market leadership.
  • In 2023, even when the whole industry was still under inventory pressure, Andes surpassed a significant total shipment milestone of 14 billion Andes-Embedded™ SoCs.
  • In 2023, the diverse product portfolio offered by Andes has resonated exceptionally well with the market and enabled its sustained growth.
  • More recently, Andes ventured into the application processor market with the launch of its cutting-edge out-of-order (OOO) processor AX65.

Andes and MachineWare Collaborate on Early RISC-V Software Development for AndesCoreTM AX45MPV

Retrieved on: 
Tuesday, February 27, 2024

In this joint effort, MachineWare lends its support by seamlessly integrating the AX45MPV into their SIM-V high-performance simulation solution.

Key Points: 
  • In this joint effort, MachineWare lends its support by seamlessly integrating the AX45MPV into their SIM-V high-performance simulation solution.
  • This integration proves invaluable for software developers, enabling them to efficiently handle intricate AI and Linux stack related workloads.
  • The result is a platform that streamlines development, testing, and software verification well in advance of physical prototypes emerging from the fabrication process.
  • "We are delighted to join forces with Andes to support the AX45MPV processor in SIM-V," said Lukas Jünger, Managing Director at MachineWare.

Andes Technology and MetaSilicon Collaborate to Build the World’s First Automotive-Grade CMOS Image Sensor Product Using RISC-V IP SoC

Retrieved on: 
Thursday, February 22, 2024

Hsinchu Taiwan, Feb. 22, 2024 (GLOBE NEWSWIRE) -- RISC-V IP vendor Andes Technology and edge computing chip provider MetaSilicon jointly announced that the MetaSilicon MAT Series is the world's first automotive-grade CMOS image sensor series using RISC-V IP SoC, using Andes' AndesCore™ N25F-SE processor.

Key Points: 
  • Hsinchu Taiwan, Feb. 22, 2024 (GLOBE NEWSWIRE) -- RISC-V IP vendor Andes Technology and edge computing chip provider MetaSilicon jointly announced that the MetaSilicon MAT Series is the world's first automotive-grade CMOS image sensor series using RISC-V IP SoC, using Andes' AndesCore™ N25F-SE processor.
  • And by using technologies such as HDR, advanced imaging can be achieved in a simple, economical, and efficient system.
  • The MAT Series 1MP CMOS image sensor chip has low power consumption and high dynamic range (HDR) characteristics.
  • Its effective image resolution is 1280 H * 960 V, and it can support high dynamic range image output up to 60fps @120dB.

Andes Technology and Spacetouch Collaborate to Unveil High-Tech Edge-Side AI Audio Processor Featuring the Powerful RISC-V AndesCore™ D25F

Retrieved on: 
Monday, January 8, 2024

Andes Technology's D25F processor, based on the AndeStar™ V5 architecture, is a 32-bit RISC-V CPU IP core equipped with P-extension (DSP/SIMD extension, draft version).

Key Points: 
  • Andes Technology's D25F processor, based on the AndeStar™ V5 architecture, is a 32-bit RISC-V CPU IP core equipped with P-extension (DSP/SIMD extension, draft version).
  • The SPV60 series of on-device AI audio processors integrate the Andes D25F core and Spacetouch’s newly developed uDSP and AI NPU (Neural Network Processor).
  • "The combination of the D25F RISC-V processor and Spacetouch’s heterogeneous multi-core AI audio processor IC brings more innovation and possibilities to the fields of audio processing, embedded systems and mobile devices.
  • "We are very excited that Spacetouch launched this new generation edge-side AI audio processor chips in collaboration with Andes.

Andes Announces General Availability of the New RISC-V Out-Of-Order Superscalar Multicore Processor, the AndesCore™ AX65

Retrieved on: 
Thursday, January 4, 2024

Hsinchu, Taiwan, Jan. 04, 2024 (GLOBE NEWSWIRE) -- Andes Technology, a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International, today proudly announces general availability of the high-performance AndesCore™ AX65 out-of-order superscalar multicore processor IP.

Key Points: 
  • Hsinchu, Taiwan, Jan. 04, 2024 (GLOBE NEWSWIRE) -- Andes Technology, a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International, today proudly announces general availability of the high-performance AndesCore™ AX65 out-of-order superscalar multicore processor IP.
  • Equipped with 13-stage pipeline, 4-wide decode, 8-wide out-of-order execution, AX65 targets the Linux application processor sockets of computing, networking, and high-end controllers.
  • Andes takes this opportunity to introduce the AX65 to complete its comprehensive CPU lineup, spanning from low-power embedded solutions to high-end Out-of-Order processors.
  • https://lnkd.in/gXwnXcCn It will include the newest AX65 high-performance, 13-stage pipeline, 4-wide decode, 8-wide out-of-order execution CPU IP core.

Andes Technology Partners with WITTENSTEIN high integrity systems (WHIS) to Build Safety-Critical Solutions with RISC-V Processors

Retrieved on: 
Monday, November 13, 2023

This partnership is geared towards assisting developers in creating safety-critical solutions utilizing RISC-V technology such as AndesCore™ N25F-SE and D25F-SE.

Key Points: 
  • This partnership is geared towards assisting developers in creating safety-critical solutions utilizing RISC-V technology such as AndesCore™ N25F-SE and D25F-SE.
  • WITTENSTEIN high integrity systems (WHIS) is a safety systems company that produces and supplies real time operating systems (RTOS) and platform solutions to the Automotive, Medical and Industrial sectors worldwide.
  • “We’re proud to partner with Andes Technology and for SAFERTOS® to support AndesCore™.” said Andrew Longhurst, Managing Director for WITTENSTEIN high integrity systems.
  • “The exciting partnership with WITTENSTEIN high integrity systems enables us to provide solid solutions to our customers who are developing products for safety-critical applications.

TASKING, Andes, and MachineWare Team Up to Facilitate Rapid Development of RISC-V ASIL Compliant Automotive Silicon

Retrieved on: 
Monday, November 6, 2023

This collaboration equips SoC design teams with automotive-grade RISC-V IPs and the appropriate tools for early firmware and MCAL (Microcontroller Abstraction Layer) development.

Key Points: 
  • This collaboration equips SoC design teams with automotive-grade RISC-V IPs and the appropriate tools for early firmware and MCAL (Microcontroller Abstraction Layer) development.
  • TASKING has been serving the global automotive industry for more than 30 years with software development tools certified for functional safety and cybersecurity.
  • The toolset can be used with Andes RISC-V development boards and MachineWare high-performance virtual prototyping solutions.
  • MachineWare’s ultra-fast virtual prototypes facilitate simulation of complex hardware/software systems for software analysis, verification and development as well as architecture exploration.

Andes and Vector Propel RISC-V AUTOSAR Software Innovations for the Automotive Industry

Retrieved on: 
Monday, November 6, 2023

This cooperation unites the expertise of two industry leaders, enabling the development of integrated automotive solutions combining AndesCore™ Safety-Enhanced (SE) RISC-V processor series and Vector’s MICROSAR Classic basic software, accelerating innovation and time-to-market.

Key Points: 
  • This cooperation unites the expertise of two industry leaders, enabling the development of integrated automotive solutions combining AndesCore™ Safety-Enhanced (SE) RISC-V processor series and Vector’s MICROSAR Classic basic software, accelerating innovation and time-to-market.
  • Vector is a leading provider of AUTOSAR software for the automotive industry.
  • AUTOSAR (AUTomotive Open System ARchitecture) is a global partnership of leading companies in the automotive and software industry to develop and establish the standardized software framework and open E/E system architecture for intelligent mobility.
  • “The automotive industry is at a pivotal juncture to aggressively incorporate fast-growing E/E and AI technologies.

Ansys medini Accelerates Andes’ Development of Automotive-Grade IP

Retrieved on: 
Thursday, November 2, 2023

To streamline ISO 26262 verification and to integrate verification information conveniently, the decision was made to introduce Ansys medini to achieve the automation and modulization of safety analysis process.

Key Points: 
  • To streamline ISO 26262 verification and to integrate verification information conveniently, the decision was made to introduce Ansys medini to achieve the automation and modulization of safety analysis process.
  • In the field of RISC-V CPU IP for the automotive market, Andes Technology has achieved remarkable milestones.
  • In 2020, Andes became the world's first RISC-V supplier to have its development process certified to ISO-26262 ASIL-D standard.
  • There are high expectations that Ansys medini will bring enhanced competitiveness to Andes Technology's automotive-grade IP business”.