Hardware acceleration

CacheQ’s New Compiler Supports Multi-Threading CPU Acceleration, Enables Software Developers to “Write Once, Accelerate Anywhere”

Retrieved on: 
Tuesday, May 25, 2021
Computing, Computer engineering, Technology, Parallel computing, Application-specific integrated circuits, Hardware acceleration, Graphics hardware, Digital signal processing, Multi-core processor, Thread, ARM architecture, Field-programmable gate array

Using CacheQs flexible compiler, users generate code for multicore processors on the same or different architectures and benchmark usage with runtime variables.

Key Points: 
  • Using CacheQs flexible compiler, users generate code for multicore processors on the same or different architectures and benchmark usage with runtime variables.
  • An Apple M1 processor with eight Arm cores is 400% faster than the single-threaded GNU Compiler Collection (GCC).
  • They can accelerate a single-thread algorithm with our tools to quickly compile and target any CPU with two or more cores.
  • CacheQ enables software developers to easily develop and deploy custom hardware accelerators for heterogeneous compute systems including FPGAs, CPUs and GPUs.

ISW Holdings Announces Hashing to Begin This Week at Pennsylvania Crypto Mining Project

Retrieved on: 
Monday, May 24, 2021
Bitmain, Hardware acceleration, Cryptocurrency, ISW, Computer engineering, Technology, Articles

LAS VEGAS, NV, May 24, 2021 (GLOBE NEWSWIRE) -- via NewMediaWire -- ISW Holdings, Inc. (OTC: ISWH) (ISW Holdings or the Company), a global brand management holdings company with commercial operations in Telehealth and Renewable Energy Cryptocurrency Mining, is excited to announce that it will begin hashing this week with its POD5IVE mining pods at the Bit5ive LLC (Bit5ive) cryptocurrency mining project based in Pennsylvania.

Key Points: 
  • LAS VEGAS, NV, May 24, 2021 (GLOBE NEWSWIRE) -- via NewMediaWire -- ISW Holdings, Inc. (OTC: ISWH) (ISW Holdings or the Company), a global brand management holdings company with commercial operations in Telehealth and Renewable Energy Cryptocurrency Mining, is excited to announce that it will begin hashing this week with its POD5IVE mining pods at the Bit5ive LLC (Bit5ive) cryptocurrency mining project based in Pennsylvania.
  • Management notes that Pods owned and operated by ISW Holdings will be hashing at competitive rates.
  • The Company will also be participating in Bit5ives coordinated pooling strategy, which will include entering into the Bitmain mining pool.
  • ISW Holdings, Inc. (ISWH), based in Nevada, is a diversified portfolio company comprised of essential business lines that serve consumer product demands.

Cadence Accelerates Cloud Hyperscale Infrastructure with Third-Generation 112G-LR SerDes IP on TSMC’s N5 Process

Retrieved on: 
Monday, May 24, 2021
Mobile, Wireless, Technology, Semiconductor, Other Technology, Software, Networks, Internet, Hardware, Electronic design automation, Data management, Computing, Technology, Computer engineering, Hardware acceleration, Digital electronics, Cadence Design Systems, Integrated circuits, SerDes, System on a chip, Application-specific integrated circuit, TSMC

Cadence Design Systems, Inc. (Nasdaq: CDNS) today unveiled its third-generation 112G long-reach (112G-LR) SerDes IP on TSMCs N5 process for hyperscale ASICs, artificial intelligence/machine learning (AI/ML) accelerators, and switch fabric systems on chip (SoCs).

Key Points: 
  • Cadence Design Systems, Inc. (Nasdaq: CDNS) today unveiled its third-generation 112G long-reach (112G-LR) SerDes IP on TSMCs N5 process for hyperscale ASICs, artificial intelligence/machine learning (AI/ML) accelerators, and switch fabric systems on chip (SoCs).
  • The Cadence 112G-LR PAM4 SerDes IP on TSMCs N5 process delivers the power, performance and area (PPA) efficiency required to build the high-bandwidth and high-reliability products for next-generation cloud data centers.
  • Our 112G-LR SerDes solution on TSMCs N5 process further solidifies our leadership position with high-performance connectivity IP offerings for hyperscale data centers, and customers can also enjoy the benefits associated with the TSMC N5 process technology.
  • The 112G-LR SerDes IP on TSMCs N5 process is part of the broader Cadence IP portfolio and supports the Cadence Intelligent System Design strategy, which enables advanced-node SoC design excellence.

GOWIN Releases USB 2.0 PHY and Device Controller IP for Their FPGA Products

Retrieved on: 
Monday, May 17, 2021
USB, Field-programmable gate array, Hardware acceleration, Computing, Computer engineering, Technology, Leon

FPGA\xe2\x80\x99s are known for high-speed IO interface flexibility as well as their ability to pipeline data processing with arithmetic logic elements.

Key Points: 
  • FPGA\xe2\x80\x99s are known for high-speed IO interface flexibility as well as their ability to pipeline data processing with arithmetic logic elements.
  • However, no FPGA company to date has been able to cost-effectively interface an FPGA directly to USB 2.0 due to its data rate, clock recovery, and IO requirements.
  • The USB 2.0 IPs are available free of charge with all GOWIN FPGA products.
  • A reference design, as well as development boards, are available, which instantiate the USB 2.0 IP cores along with a USB 2.0 to UART bridging example to get started.

Integrated Ventures Reports Record Q3/2021 Revenues Of $696,805 With Balance Sheet Containing $3,522,563 In Mining Equipment Assets And $1,515.201 In Digital Currencies

Retrieved on: 
Friday, May 14, 2021
Bitmain, Hardware acceleration, Forward-looking statement

The ending cash balance was $99,974.\nReported Record Mining Equipment Purchases And Commitments: during Q3/2021, the Company executed purchase orders for 452 miners, with total cost of $2,970,723.

Key Points: 
  • The ending cash balance was $99,974.\nReported Record Mining Equipment Purchases And Commitments: during Q3/2021, the Company executed purchase orders for 452 miners, with total cost of $2,970,723.
  • In addition, INTV had signed a 12 month supply agreement with Bitmain for 4,800 units, for a total price of $34,047,600.
  • You can identify these statements by use of the words "may," "will," "should," "plans," "explores," "expects," "anticipates," "continue," "estimate," "project," "intend," and similar expressions.
  • Forward-looking statements involve risks and uncertainties that could cause actual results to differ materially from those projected or anticipated.

Achronix to Present at Upcoming Investor Conferences

Retrieved on: 
Thursday, May 13, 2021
Technology, Semiconductor, Other Technology, Data management, Fabless semiconductor companies, Reconfigurable computing, Achronix, Electronics industry, Computing, Hardware acceleration, Integrated circuits, Technology, Field-programmable gate array, Achronix Semiconductor Corporation, ACE Convergence Acquisition Corp., ACE Equity Partners, ACHRONIX SEMICONDUCTOR CORPORATION, ACE CONVERGENCE ACQUISITION CORP., ACE EQUITY PARTNERS

Achronix is the only supplier to have both high-performance and high-density standalone FPGAs and licensed eFPGA IP solutions.

Key Points: 
  • Achronix is the only supplier to have both high-performance and high-density standalone FPGAs and licensed eFPGA IP solutions.
  • Achronix Speedster\xc2\xae7t FPGA and SpeedcoreTM eFPGA IP offerings are further enhanced by ready-to-use VectorPathTM accelerator cards targeting AI, machine learning, networking and data center applications.
  • All Achronix products are fully supported by the Achronix Tool Suite which enables customers to quickly develop their own custom applications.
  • Achronix has a global footprint, with sales and design teams across the U.S., Europe and Asia.

Klas Government Launches Market's First Tactical GPU That Extends AI/ML To Network Edge

Retrieved on: 
Wednesday, May 12, 2021
Computer architecture, Electronic engineering, Computer engineering, Graphics hardware, GPGPU, Artificial intelligence, Graphics processing unit, Hardware acceleration, Nvidia, Turing

To date, GPUs with this kind of power simply haven\'t been able tooperate at the tactical edge due to Size, Weight and Power (SWaP) and environmental limitations.\nKlas\' VoyagerGPU, the first tactical unit to deploy NVIDIA\'s latest GPU technology (Pascal and Turing-based GPU), addresses these tactical edge challenges while meeting Standardized A-Kit / Vehicle Envelope (SAVE) specifications for tactical comms \' SWaP in military vehicles.

Key Points: 
  • To date, GPUs with this kind of power simply haven\'t been able tooperate at the tactical edge due to Size, Weight and Power (SWaP) and environmental limitations.\nKlas\' VoyagerGPU, the first tactical unit to deploy NVIDIA\'s latest GPU technology (Pascal and Turing-based GPU), addresses these tactical edge challenges while meeting Standardized A-Kit / Vehicle Envelope (SAVE) specifications for tactical comms \' SWaP in military vehicles.
  • As a result, Klas unlocks AI/ML breakthroughs in edge environments in ways not previously possible.\nVoyagerGPU is a core component of Klas\' Voyager Tactical Cloud Platform (TCP), which brings the immense analytical power of the cloud to the forward edge and battlefield vehicles operating in tactical edge environments and at a small form factor.
  • "VoyagerGPU is a core component of Klas\' modular system that allows our DoD customers to incorporate new, innovative capabilities as the mission dictates.
  • "\nTo learn more about how Klas Government\'s tactical communications solutions enabled the connected battlefield, visit http://www.klasgov.com .\nKlas Government makes the world\'s most powerful deployable communications solutions to meet the needs of government and military communicators in any operational environment.

Sigasi wants to empower designers working on open source hardware projects with a free license of Sigasi Studio

Retrieved on: 
Tuesday, May 11, 2021
Hardware acceleration, Integrated circuits, Computer engineering, Technology, Computing, Field-programmable gate array, Code refactoring, Application-specific integrated circuit, Integrated development environment

Advanced features such as intelligent autocomplete, code refactoring and automatic documentation will make hardware development easier, more efficient and much faster.

Key Points: 
  • Advanced features such as intelligent autocomplete, code refactoring and automatic documentation will make hardware development easier, more efficient and much faster.
  • Sigasi also integrates with several FPGA and ASIC tools.\nSigasi Studio shortens the feedback loop: trivial errors are avoided and designers can focus on the concepts of hardware design while Sigasi Studio assists to write correct syntax and code.
  • Sigasi Studio is a must-have tool for all modern-day digital designers.
  • Sigasi now wants to make the adoption of Sigasi Studio easier so that open source projects can improve faster by handing out free licenses.\nApply for your free license through the Open Source form on the Sigasi website.

Synopsys ZeBu Server 4 Adopted by Xsight Labs for Intelligent Networking Switch Processor

Retrieved on: 
Monday, May 10, 2021
Computing, Technology, Science and technology, Hardware acceleration, Synopsys, Cloud infrastructure, System on a chip, Cloud computing, Emulation, EVE/ZeBu

b'MOUNTAIN VIEW, Calif., May 10, 2021 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS ) today announced that Xsight Labs has adopted Synopsys ZeBu Server 4 emulation solution for validation of its X1 intelligent networking switch processor.

Key Points: 
  • b'MOUNTAIN VIEW, Calif., May 10, 2021 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS ) today announced that Xsight Labs has adopted Synopsys ZeBu Server 4 emulation solution for validation of its X1 intelligent networking switch processor.
  • ZeBu Server 4\'s performance and 7 billion gate cloud capacity has enabled Xsight Labs to further strengthen its pre-tapeout validation methodology using complex networking workloads with full system-on-chip (SoC) emulation.
  • Synopsys\' ZeBu Server 4 cloud solution is an integral element of our verification methodology, which has provided our verification team with convenient, remote access to the high capacity required for full SoC emulation to perform extensive networking validation testing," said Erez Shaizaf, co-founder and Switch General Manager at Xsight Labs.
  • "ZeBu Server cloud solution was the perfect match for Xsight Labs\'s requirements, enabling remote access and debugging of billion gate designs with complex and long application workloads.

Riot Blockchain Announces April Production and Operations Updates

Retrieved on: 
Monday, May 10, 2021
Bitmain, Hardware acceleration, XE-class submarine, Mining, XC2, Miner, Human activities, Economy

\xc2\xa0These updates are intended to keep shareholders informed of Riot\xe2\x80\x99s mining production as it continues to deploy its expanding miner fleet.\nAs part of the August 2020 purchase orders with Bitmain, 6500 S19 Pro Antminers were shipped in early May 2021.

Key Points: 
  • \xc2\xa0These updates are intended to keep shareholders informed of Riot\xe2\x80\x99s mining production as it continues to deploy its expanding miner fleet.\nAs part of the August 2020 purchase orders with Bitmain, 6500 S19 Pro Antminers were shipped in early May 2021.
  • The Company is expanding and upgrading its mining operations by securing the most energy efficient miners currently available.
  • Riot is headquartered in Castle Rock, Colorado, and the Company\xe2\x80\x99s mining operations are located in upstate New York, under a co-location hosting agreement with Coinmint.
  • Words such as "anticipates," \xe2\x80\x9cbelieves,\xe2\x80\x9d "plans," "expects," "intends," "will," "potential," "hope" and similar expressions are intended to identify forward-looking statements.