Socs

Point2 Technology to Showcase Connectivity Innovations and Present at OFC 2024

Retrieved on: 
Tuesday, March 19, 2024
Cloud, Optics, Socs, Conference, SOC, Entrepreneurship, SAN, Molex, Copper, RF, EDC, AEC, San Diego Convention Center, Medical device

SAN JOSE, Calif., March 19, 2024 /PRNewswire/ -- Point2 Technology, a leading provider of ultra-low-power, low-latency mixed-signal SoC solutions for multi-terabit interconnect, today announced its participation in the Optical Fiber Communication Conference and Exhibition (OFC) 2024, March 24 - 28, at the San Diego Convention Center.

Key Points: 
  • SAN JOSE, Calif., March 19, 2024 /PRNewswire/ -- Point2 Technology , a leading provider of ultra-low-power, low-latency mixed-signal SoC solutions for multi-terabit interconnect, today announced its participation in the Optical Fiber Communication Conference and Exhibition (OFC) 2024, March 24 - 28, at the San Diego Convention Center.
  • Sean Park, Point2 Technology's Co-Founder and CEO, will participate in the "Cutting-Edge Technologies for Interconnecting AI/ML Clusters" panel discussion at OFC 2024.
  • Point2 Technology recently announced a $22.6 million Series B extension from Bosch Ventures, Molex and other investors, validating the demand for the company's technology in AI/ML data center applications and its potential to disrupt interconnect in the automotive sector.
  • Attendees are invited to visit Point2 Technology's Innovation Suite at the Marriot Marquis Marina Hotel, San Diego, CA, March 26 – 28, 2024, and explore the company's advanced interconnect innovations firsthand.

QuickLogic and Zero-Error Systems Partner to Deliver Radiation-Tolerant eFPGA IP for Commercial Space Applications

Retrieved on: 
Thursday, March 14, 2024
LEO, Socs, Interest, Application-specific integrated circuit, Partnership, SAN, Australis, ZES, SWAP, Field-programmable gate array, Senior, Marketing, IP, LDAP, Intellectual property, Growth, PPA, FPGA

SAN JOSE, Calif., March 14, 2024 /PRNewswire/ -- QuickLogic Corporation (NASDAQ: QUIK), a developer of embedded FPGA (eFPGA) IP, ruggedized FPGAs and Endpoint AI/ML solutions, today announced a strategic partnership with Zero-Error Systems America (ZES), a leading provider of radiation-hardened-by-design (RHBD) semiconductor solutions and intellectual property (IP). This partnership enables the creation of radiation-tolerant eFPGA IP for commercial space applications, targeting ASICs and SoCs that require high reliability in flight and space environments.

Key Points: 
  • This partnership enables the creation of radiation-tolerant eFPGA IP for commercial space applications, targeting ASICs and SoCs that require high reliability in flight and space environments.
  • However, conventional eFPGA IP, crucial for post-launch reprogrammability, lacks optimization for these radiation-tolerant commercial and space applications.
  • Utilizing ZES' robust RHBD cell libraries, QuickLogic and ZES will partner to address this need by delivering state-of-the-art, reliable, radiation-tolerant eFPGA IP cores and customization options.
  • Interested commercial customers can contact QuickLogic at [email protected] regarding their radiation-tolerant eFPGA IP needs.

Silicon Box cutting-edge, advanced panel-level packaging foundry announces $3.6B investment for expansion into Italy

Retrieved on: 
Tuesday, March 12, 2024
Dai, Automation, EV, Socs, Conference, Environment, Original equipment manufacturer, EVS, Intelligence, Business, Education, HPC, Sips, Artificial intelligence, Carbon footprint, Carbon, LLM, Chiplet, Investment, Semiconductor, European, Ecosystem, European Commission, Sustainability, IDMS, Government, ISSCC, Renewable energy

ROME, March 12, 2024 /PRNewswire/ -- Silicon Box cutting-edge, advanced panel-level packaging foundry announced its intention to collaborate with the Italian government to invest up to $3.6B (€3.2B) in Northern Italy, as the site of a new, state-of-the-art semiconductor assembly and test facility. This facility will help meet critical demand for advanced packaging capacity to enable next generation technologies that Silicon Box anticipates by 2028. The multi-year investment will replicate Silicon Box's flagship foundry in Singapore which has proven capability and capacity for the world's most advanced semiconductor packaging solutions, then expand further into 3D integration and testing. When completed, the new facility will support approximately 1,600 Silicon Box employees in Italy. The construction of the facility is also expected to create several thousand more jobs, including eventual hiring by suppliers. Design and planning for the facility will begin immediately, with construction to commence pending European Commission approval of planned financial support by the Italian State.

Key Points: 
  • This facility will help meet critical demand for advanced packaging capacity to enable next generation technologies that Silicon Box anticipates by 2028.
  • Through the investment, Silicon Box has plans for greater innovation and expansion in Europe, and globally.
  • "We are excited to bring Italy to the forefront of chiplet deployment and the semiconductor industry, through this investment into the world's most advanced packaging solution.
  • Notably, Silicon Box facilities specialize in advanced chiplet integration capabilities ("advanced packaging"), on a large manufacturing format for scale.

Silicon Box cutting-edge, advanced panel-level packaging foundry announces $3.6B investment for expansion into Italy

Retrieved on: 
Tuesday, March 12, 2024
Dai, Automation, EV, Socs, Conference, Environment, Original equipment manufacturer, EVS, Intelligence, Business, Education, HPC, Sips, Artificial intelligence, Carbon footprint, Carbon, LLM, Chiplet, Investment, Semiconductor, European, Ecosystem, European Commission, Sustainability, IDMS, Government, ISSCC, Renewable energy

ROME, March 12, 2024 /PRNewswire/ -- Silicon Box cutting-edge, advanced panel-level packaging foundry announced its intention to collaborate with the Italian government to invest up to $3.6B (€3.2B) in Northern Italy, as the site of a new, state-of-the-art semiconductor assembly and test facility. This facility will help meet critical demand for advanced packaging capacity to enable next generation technologies that Silicon Box anticipates by 2028. The multi-year investment will replicate Silicon Box's flagship foundry in Singapore which has proven capability and capacity for the world's most advanced semiconductor packaging solutions, then expand further into 3D integration and testing. When completed, the new facility will support approximately 1,600 Silicon Box employees in Italy. The construction of the facility is also expected to create several thousand more jobs, including eventual hiring by suppliers. Design and planning for the facility will begin immediately, with construction to commence pending European Commission approval of planned financial support by the Italian State.

Key Points: 
  • This facility will help meet critical demand for advanced packaging capacity to enable next generation technologies that Silicon Box anticipates by 2028.
  • Through the investment, Silicon Box has plans for greater innovation and expansion in Europe, and globally.
  • "We are excited to bring Italy to the forefront of chiplet deployment and the semiconductor industry, through this investment into the world's most advanced packaging solution.
  • Notably, Silicon Box facilities specialize in advanced chiplet integration capabilities ("advanced packaging"), on a large manufacturing format for scale.

AMD Extends Market-Leading FPGA Portfolio with AMD Spartan UltraScale+ Family Built for Cost-Sensitive Edge Applications

Retrieved on: 
Tuesday, March 5, 2024
Documentation, Socs, IPS, Embedded, Health, CERN, PPK, NIST, AMD, Family, Knowledge, LPDDR5, Cyberattack, Robotics, FPGA, Video game

SANTA CLARA, Calif., March 05, 2024 (GLOBE NEWSWIRE) -- AMD (NASDAQ: AMD) today announced the AMD Spartan™ UltraScale+™ FPGA family, the newest addition to the extensive portfolio of AMD Cost-Optimized FPGAs and adaptive SoCs. Delivering cost and power-efficient performance for a wide range of I/O-intensive applications at the edge, Spartan UltraScale+ devices offer the industry’s highest I/O to logic cell ratio in FPGAs built in 28nm and lower process technologyi, deliver up to 30 percent lower total power consumption versus the previous generationii, and contain the most robust set of security featuresiii in the AMD Cost-Optimized Portfolio.

Key Points: 
  • The extensive AMD FPGA portfolio also provides the scalability to start with cost-optimized FPGAs and continue through to midrange and high-end products.
  • Spartan UltraScale+ FPGAs offer the most state-of-the-art security features in the AMD Cost-Optimized FPGA portfolio.
  • AMD Spartan UltraScale+ FPGA family sampling and evaluation kits are expected to be available in the first half of 2025.
  • Documentation is available today with tools support starting with the AMD Vivado Design Suite in the fourth quarter of 2024.

Andes Technology and MetaSilicon Collaborate to Build the World’s First Automotive-Grade CMOS Image Sensor Product Using RISC-V IP SoC

Retrieved on: 
Thursday, February 22, 2024
ISO, CMOS, HDR, MAT, Outline, Socs, AEC, ADAS, Safety, DCG, Andes Technology, ISP, Judgement, IP, CIS, SOC, LFM, CPU, Medical imaging

Hsinchu Taiwan, Feb. 22, 2024 (GLOBE NEWSWIRE) -- RISC-V IP vendor Andes Technology and edge computing chip provider MetaSilicon jointly announced that the MetaSilicon MAT Series is the world's first automotive-grade CMOS image sensor series using RISC-V IP SoC, using Andes' AndesCore™ N25F-SE processor.

Key Points: 
  • Hsinchu Taiwan, Feb. 22, 2024 (GLOBE NEWSWIRE) -- RISC-V IP vendor Andes Technology and edge computing chip provider MetaSilicon jointly announced that the MetaSilicon MAT Series is the world's first automotive-grade CMOS image sensor series using RISC-V IP SoC, using Andes' AndesCore™ N25F-SE processor.
  • And by using technologies such as HDR, advanced imaging can be achieved in a simple, economical, and efficient system.
  • The MAT Series 1MP CMOS image sensor chip has low power consumption and high dynamic range (HDR) characteristics.
  • Its effective image resolution is 1280 H * 960 V, and it can support high dynamic range image output up to 60fps @120dB.

Mobix Labs Establishes Technical Advisory Board

Retrieved on: 
Monday, March 4, 2024
Mobile, Wireless, Technology, Contracts, Semiconductor, 5G, Satellite, Telecommunications, Hardware, Data Management, Defense, Acquisition, Moses Austin, Internet of things, Rensselaer Polytechnic Institute, GM, Telit, Texas Instruments, Zarlink, Application-specific integrated circuit, Stanford University, Microsemi, University, History, Engineering, GainSpan, Conexant, Map, Socs, RF, Management

Mobix Labs Inc .

Key Points: 
  • Mobix Labs Inc .
  • (Nasdaq: MOBX), a fabless semiconductor company developing disruptive next-generation connectivity technologies for 5G infrastructure, satellite communications and defense industries, today announced the creation of a technical advisory board that will play a key role in assessing existing and new technologies, corporate strategy and potential acquisitions.
  • “I came to Mobix Labs because I believe in the company’s disruptive value proposition, product road map and seasoned management team,” said Aralis.
  • “The creation of our technical advisory board marks another stepping stone for Mobix Labs that will advance our IP and patent portfolio globally,” said Fabian Battaglia, CEO of Mobix Labs.

proteanTecs Joins Arm Total Design, Brings Lifecycle Health and Performance Monitoring to Arm-based Custom SoCs

Retrieved on: 
Wednesday, February 28, 2024
Data Analytics, Internet, Hardware, Artificial Intelligence, Data Management, Professional Services, Technology, Mobile, Wireless, Total, Multimedia, Socs, Silicon, Electronics, PPA, Ecosystem, Arm, SOC, CSO, CSS, Cryptocurrency

proteanTecs, a global leader of deep data analytics for advanced electronics, today announced its participation in the Arm® Total Design ecosystem.

Key Points: 
  • proteanTecs, a global leader of deep data analytics for advanced electronics, today announced its participation in the Arm® Total Design ecosystem.
  • View the full release here: https://www.businesswire.com/news/home/20240228787878/en/
    proteanTecs joins the Arm Total Design ecosystem, empowering customers with deep data insights from production to field.
  • “It is a privilege to collaborate with Arm and other industry leaders in the Arm Total Design ecosystem to drive innovation and simplify custom SoC development.
  • By enhancing Arm-based SoCs with proteanTecs’ monitoring solutions, customers gain in-depth and high-visibility coverage that both accelerates and fortifies their path to production.”

Cadence Expands Tensilica Vision Family with Radar Accelerator and New DSPs Optimized for Automotive Applications

Retrieved on: 
Wednesday, February 28, 2024
Semiconductor, Vehicle Technology, Technology, Automotive, Artificial Intelligence, Cloud, CDNS, Halide, MAC, Robotics, Algorithm, Multimedia, Socs, AI, Cadence Design Systems, ADAS, Language, Silicon, TIE, PCL, Vision, NMS, Prevalence, Safety, Point Cloud Library, OpenCL, SDK, Ecosystem, Acceleration, SOC, DSP, DSPS, Graphics processing unit, Central processing unit, Telescopic sight

The new high-performance Cadence® Tensilica® Vision 331 DSP and Vision 341 DSP combine vision, radar, lidar and AI processing in a single DSP for multi-modal, sensor-based system designs, delivering the best energy efficiency in the smallest area.

Key Points: 
  • The new high-performance Cadence® Tensilica® Vision 331 DSP and Vision 341 DSP combine vision, radar, lidar and AI processing in a single DSP for multi-modal, sensor-based system designs, delivering the best energy efficiency in the smallest area.
  • When paired with the new Cadence Tensilica Vision 4DR Accelerator optimized for 4D imaging radar applications, customers can achieve even greater radar performance and higher energy efficiency.
  • View the full release here: https://www.businesswire.com/news/home/20240228430265/en/
    Cadence expanded its Tensilica IP portfolio with two new Vision DSPs and a radar accelerator to address automotive sensor fusion applications.
  • We continue to use Cadence Tensilica Vision DSPs in our products and welcome the new DSPs that can accommodate both cameras and radar.

Conceal Unveils Integration with SentinelOne® to Fortify Web Security

Retrieved on: 
Tuesday, February 27, 2024
Technology, Audio, Video, Business, Consulting, Professional Services, Artificial Intelligence, Other Technology, Telecommunications, Software, Networks, Internet, Hardware, Data Management, Security, OEM, Multimedia, Telemetry, Concealment device, Risk, URL, Organization, Ecosystem, Socs, SentinelOne, Risk management

Conceal , a leader in cybersecurity solutions and SentinelOne Technology Alliance Partner, proudly announces the launch of an integration between ConcealBrowse™, an AI-powered secure browser extension, and the SentinelOne Singularity™ Platform .

Key Points: 
  • Conceal , a leader in cybersecurity solutions and SentinelOne Technology Alliance Partner, proudly announces the launch of an integration between ConcealBrowse™, an AI-powered secure browser extension, and the SentinelOne Singularity™ Platform .
  • “The integration of ConcealBrowse with SentinelOne marks a significant step in our mission to defend organizations against web-based threats,” said Gordon Lawson, CEO of Conceal.
  • Organizations can integrate any security applications and tools, regardless of vendor, into a single platform with codeless integrations, data ingestion, and security actions across hundreds of tools.
  • For more information about Conceal and the integration with SentinelOne, please visit https://info.conceal.io/sentinel-one .