Soft microprocessor

Bluespec, Inc. Joins the Xilinx® Partner Program, Offering Drop-in Ready RISC-V Processors for Xilinx FPGAs

Retrieved on: 
Wednesday, May 12, 2021
Digital electronics, Computing, Computer architecture, Instruction set architectures, Microcontrollers, Xilinx, RISC-V, Reduced instruction set computer, Semiconductor intellectual property core, Soft microprocessor, MicroBlaze

The Xilinx Partner Program is a worldwide ecosystem of qualified companies that offer acceleration solutions, IP cores, design services, and board development and production.

Key Points: 
  • The Xilinx Partner Program is a worldwide ecosystem of qualified companies that offer acceleration solutions, IP cores, design services, and board development and production.
  • The RISC-V processor cores are optimized, verified, and drop-in ready for use in Xilinx\'s Vivado and Vitis design environments.
  • The two Bluespec RISC-V families are:\nThe BMR family is targeted at applications using a Real-Time Operating System or running on bare metal.
  • Xilinx users now have a viable alternative to proprietary processor architectures and a simplified on-ramp for using RISC-V processors in their designs.

QuickLogic Joins OpenHW Group Further Extends Commitment to Open Source Ecosystem

Retrieved on: 
Tuesday, September 15, 2020
Field-programmable gate array, Hardware acceleration, Reconfigurable computing, Electronics, Computing, Fabless semiconductor companies, Soft core, Soft microprocessor

By joining the OpenHW Group, QuickLogic brings to the ecosystem its deep expertise of FPGA technology and its multiple applications to low power MCU SoC integration.

Key Points: 
  • By joining the OpenHW Group, QuickLogic brings to the ecosystem its deep expertise of FPGA technology and its multiple applications to low power MCU SoC integration.
  • As part of its contribution, QuickLogic's CTO, Dr. Tim Saxe will co-chair the Hardware Task Group within the OpenHW Group ecosystem.
  • The OpenHW Groupco-hosts the Open Source Developer Forum(OSDForum), a workshop which includestalks from leading industry and academic experts.The next event, which will be hosted virtually on September 15, 2020, isfocused on IoT, Edge and Machine Learning development leveraging open source softwareandhardwarebuilding blocks,andcomplements QuickLogic's own QuickLogic Open Reconfigurable Computing (QORC) initiative.
  • "QuickLogic is the first Programmable Logic company to fully embrace and actively contribute to open source FPGA tools," said Brian Faith, QuickLogic's president and CEO.

Andes to Presents Andes Custom Extensions to the RISC-V V5 CPU Core for Creating Highly Competitive True Wireless Stereo SoC Designs

Retrieved on: 
Wednesday, March 11, 2020
Computer architecture, Computers, Digital technology, Instruction set architectures, Microcontrollers, RISC-V, Microprocessors, Reduced instruction set computer, Central processing unit, Multi-core processor, Instruction set architecture, Soft microprocessor

The first will feature Advanced Engineer Tung Wei describing how using Andes Custom Extensions (ACE) with Andes RISC-V CPU cores can create a highly competitive SoC.

Key Points: 
  • The first will feature Advanced Engineer Tung Wei describing how using Andes Custom Extensions (ACE) with Andes RISC-V CPU cores can create a highly competitive SoC.
  • Andes RISC-V CPU and it flexibility will create a friendly platform of design SoCs.
  • Using ACE to add acceleration to our D25F RISC-V CPU core enables SoC designers to enhance performance and reduce power of their SoC design.
  • Join the Andes RISC-V CON Online webinar series to learn how easy it is to add custom instructions for your TWS design.

Tortuga Logic and Synopsys Collaborate to Deliver System-Level Security to SoCs Built with Synopsys DesignWare ARC Processor IP

Retrieved on: 
Tuesday, April 23, 2019
Computer architecture, Arc, System on a chip, Synopsys, Soft microprocessor

The basis of the solution is the combination of security features built into Synopsys' DesignWare ARC Processor IP and Radix-S, Tortuga Logic's industry-leading security verification software.

Key Points: 
  • The basis of the solution is the combination of security features built into Synopsys' DesignWare ARC Processor IP and Radix-S, Tortuga Logic's industry-leading security verification software.
  • Synopsys ARC Processor IP is a portfolio of highly configurable 32-bit CPUs whose power and area efficiencies have been optimized for a wide range of embedded applications.
  • SoC designers can differentiate their products by configuring each ARC Processor to meet their specific performance and area requirements.
  • "DesignWare ARC Processor IP provides a rich set of security options that help protect systems from evolving security threats such as IP theft and malicious attacks," said John Koeter, vice president of marketing for IP at Synopsys.

Bluespec, Inc. Releases a Second Family of Open-Source RISC-V Processors to Spur Open Innovation

Retrieved on: 
Thursday, December 13, 2018
Computer architecture, Instruction set architectures, Computing, Microcontrollers, Computer engineering, RISC-V, Reduced instruction set computer, Soft microprocessor

FRAMINGHAM, Mass., Dec. 13, 2018 /PRNewswire-PRWeb/ --Bluespec, Inc. releases a second family of open-source RISC-V processors to spur open innovation:

Key Points: 
  • FRAMINGHAM, Mass., Dec. 13, 2018 /PRNewswire-PRWeb/ --Bluespec, Inc. releases a second family of open-source RISC-V processors to spur open innovation:
    December 13, 2018 - Bluespec Inc. has released Flute, its second in a family of commercially supported open-source RISC-V processors.
  • Flute is a configurable 5-stage application processor complementing the previously released 3-stage Piccolo microcontroller, both of which are suitable for IoT.
  • The initial release provides synthesizable Verilog for a bare metal RV32IMA core and a supervisor level RV64IMA core.
  • "With the emergence of the free and open RISC-V ISA an open-source business model is now possible for processor IP.

Bluespec, Inc. Releases a New Family of Open-Source RISC-V Processors

Retrieved on: 
Wednesday, August 15, 2018
Computer architecture, Computing, Electronic engineering, Instruction set architectures, Hardware description languages, Bluespec, RISC-V, Verilog, Reduced instruction set computer, Field-programmable gate array, Soft microprocessor, High-level synthesis

The repository ( https://github.com/bluespec/Piccolo ) contains a royalty-free synthesizable Verilog core that can be easily integrated and deployed into an ASIC or FPGA.

Key Points: 
  • The repository ( https://github.com/bluespec/Piccolo ) contains a royalty-free synthesizable Verilog core that can be easily integrated and deployed into an ASIC or FPGA.
  • "The process of licensing traditional processors is time consuming and expensive" says Jim Hogan of Managing Partner of Vista Ventures.
  • Bluespec's release of verified and easy to integrate processors is yet another indication of the RISC-V turning point."
  • Bluespec, Inc. provides hardware development tools that reduce the time, effort and risk of developing RISC-V processors and systems.

C-SKY Microsystems Selects QuickLogic as Their Strategic eFPGA Partner by Signing Master Technology License Agreement

Retrieved on: 
Monday, June 25, 2018
Electronic engineering, Electronics, Computer architecture, Embedded microprocessors, Field-programmable gate array, Ice, Arc, Mentor Graphics, Xilinx, Soft microprocessor

SUNNYVALE, Calif., June 25, 2018 /PRNewswire/ --QuickLogic Corporation (NASDAQ: QUIK), a developer of ultra-low power embedded FPGA (eFPGA) IP, Multi-core Voice-enabled SoC, display bridge and programmable logic solutions, today announced that C-SKY Microsystems Co., Ltd. has signed a Master Technology License Agreement for its ArcticPro Embedded FPGA (eFPGA) IP.

Key Points: 
  • SUNNYVALE, Calif., June 25, 2018 /PRNewswire/ --QuickLogic Corporation (NASDAQ: QUIK), a developer of ultra-low power embedded FPGA (eFPGA) IP, Multi-core Voice-enabled SoC, display bridge and programmable logic solutions, today announced that C-SKY Microsystems Co., Ltd. has signed a Master Technology License Agreement for its ArcticPro Embedded FPGA (eFPGA) IP.
  • C-SKY is the only high volume embedded CPU provider in China with its own V2 Instruction Set Architecture (ISA).
  • C-SKY plans to develop a highly flexible ultra-low power common CPU platform that incorporates QuickLogic's ArcticPro eFPGA technology, utilizing the SMIC 40nm LL process.
  • "We believe that our experience in delivering programmable SoCs for embedded applications uniquely positions us to deliver complementary and easy-to-use ultra-low power eFPGA technology."