Canaan’s RISC-V based edge AIoT SoC adopted VeriSilicon’s ISP and GPU IPs
Its 20-bit depth pipeline architecture supports advanced image processing algorithms such as triple-exposure High Dynamic Range (HDR) and 3D Noise Reduction (3DNR).
- Its 20-bit depth pipeline architecture supports advanced image processing algorithms such as triple-exposure High Dynamic Range (HDR) and 3D Noise Reduction (3DNR).
- VeriSilicon’s ISP is one of the key factors driving innovation in our edge AIoT SoCs.”
“RISC-V is increasingly important in embedded products. - “Through our close collaboration with Canaan, the edge AIoT SoC K230 has achieved high image quality while maintaining low power consumption and latency.
- Moreover, K230 can support multiple sensors leveraging the advanced Multi-Context Management (MCM) feature of ISP8000, further enhancing its market competitiveness.”