Synopsys

Synopsys Delivers Certified EDA Flows and High-Quality IP for Intel 16 Process

Retrieved on: 
Tuesday, July 11, 2023

SUNNYVALE, Calif., July 11, 2023 /PRNewswire/ -- Easing the design of chips for power- and space-constrained applications, Synopsys, Inc. (Nasdaq: SNPS) today announced its digital and custom design flows, powered by the Synopsys.ai™ full-stack AI-driven EDA suite, are certified for the Intel Foundry Services (IFS) Intel 16 process. Used alongside high-quality Synopsys Foundation IP and Interface IP, which have been optimized for the same IFS technology, customers can confidently meet or beat design targets for advanced mobile, RF, IoT, consumer, storage and military, aerospace and government (MAG) systems. 

Key Points: 
  • SUNNYVALE, Calif., July 11, 2023 /PRNewswire/ -- Easing the design of chips for power- and space-constrained applications, Synopsys, Inc. (Nasdaq: SNPS ) today announced its digital and custom design flows, powered by the Synopsys.ai™ full-stack AI-driven EDA suite , are certified for the Intel Foundry Services (IFS) Intel 16 process.
  • "With our certified EDA flows and silicon-proven IP for the Intel 16 process, we are advancing the smart everything world with greater intelligence and connectivity."
  • "Mutual customers can achieve higher silicon utilization for their consumer, aerospace and government SoC designs using Synopsys EDA flows and IP on our Intel 16 technology."
  • The Synopsys Digital Design Family, Synopsys Custom Design Family and Synopsys Interface and Foundation IP are available now for advanced IFS processes.

Attend the 17th Annual Kiterocket Lounge During SEMICON West 2023, The Chip Industry’s Largest Event in San Francisco

Retrieved on: 
Wednesday, July 5, 2023

SAN FRANCISCO, July 05, 2023 (GLOBE NEWSWIRE) -- Members of the press are invited to the 17th Annual Kiterocket Lounge , a premier networking event for semiconductor executives during SEMICON West .

Key Points: 
  • SAN FRANCISCO, July 05, 2023 (GLOBE NEWSWIRE) -- Members of the press are invited to the 17th Annual Kiterocket Lounge , a premier networking event for semiconductor executives during SEMICON West .
  • We welcome you to come to the Lounge to connect with influential C-suite executives within the rapidly evolving semiconductor industry.
  • The Kiterocket Lounge will be located directly above Moscone’s North Hall entrance and at the connecting bridge into the South Hall.
  • Kiterocket Lounge is the city’s best corporate hospitality venue, overlooking the Yerba Buena Gardens and offering spectacular views of the San Francisco skyline.

Synopsys and Golden Electronics Collaborate to Expand Chip Design Talent in Jordan

Retrieved on: 
Monday, July 3, 2023

(Nasdaq: SNPS ) and Golden Electronics, an IC development services company based in Amman, are collaborating to increase the number of industry-ready chip design engineers in Jordan.

Key Points: 
  • (Nasdaq: SNPS ) and Golden Electronics, an IC development services company based in Amman, are collaborating to increase the number of industry-ready chip design engineers in Jordan.
  • The collaboration is in the form of a very large-scale integration (VLSI) talent acceleration initiative built on Golden Electronics' acquisition of multiple licenses for Synopsys' leading electronic design automation (EDA) software, educational design kits and microelectronics curriculum.
  • "Golden Electronics is at the forefront of IC development in Jordan," said Khaldoon Abugharbieh, CEO of Golden Electronics.
  • It provides Golden Electronics with Synopsys industry-grade tools and vital access to the company's educational design kits and microelectronics curriculum.

Ashling announces availability of their new product, the Vitra-XS Debug & Trace Probe for Synopsys ARC® Processors

Retrieved on: 
Friday, June 30, 2023

Vitra-XS is the newest member of the Ashling probe family and is a Debug & Trace Probe for embedded development with support for multiple target architectures including Synopsys ARC Processor powered systems.

Key Points: 
  • Vitra-XS is the newest member of the Ashling probe family and is a Debug & Trace Probe for embedded development with support for multiple target architectures including Synopsys ARC Processor powered systems.
  • View the full release here: https://www.businesswire.com/news/home/20230630688262/en/
    Vitra-XS Debug & Trace Probe (Graphic: Business Wire)
    Vitra-XS works with the Synopsys ARC MetaWare Development Toolkit , which is a complete development environment for embedded C/C++ development on ARC and includes an IDE, Compiler, Debugger and Analysis tools.
  • Vitra-XS supports all Synopsys ARC EM, EV, HS, NPX and VPX processors with the ARC Real-Time Trace (RTT) module (8-bit or dual 8-bit ports).
  • “Vitra-XS supports real-time trace which provides some key advantages when it comes to debugging and validating embedded systems.

Synopsys and Samsung Foundry Deepen Collaboration to Accelerate Multi-Die System Design for Advanced Samsung Processes

Retrieved on: 
Wednesday, June 28, 2023

SUNNYVALE, Calif., June 28, 2023 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS) and Samsung Foundry are deepening their collaboration to help chipmakers accelerate the design of 2.5D and 3D multi-die systems on Samsung's most advanced process technologies. The collaboration addresses key requirements of multi-die systems for intense computing applications including high-performance computing, AI, automotive and mobile. By providing an unmatched combination of certified EDA reference flows including Synopsys 3DIC Compiler and UCIe IP for die-to-die connectivity, mutual customers can accelerate the development of multi-die systems on Samsung Foundry's 5nm, 4nm and 3nm processes and using I-Cube and X-Cube technologies.

Key Points: 
  • Certified multi-die system design reference flow and secure die-to-die IP speed design and silicon success for Samsung Foundry SF 5/4/3 processes and I-Cube and X-Cube technologies.
  • Comprehensive and scalable Synopsys Multi-Die System Solution enables fast heterogeneous integration from early design exploration to silicon lifecycle management.
  • (Nasdaq: SNPS ) and Samsung Foundry are deepening their collaboration to help chipmakers accelerate the design of 2.5D and 3D multi-die systems on Samsung's most advanced process technologies.
  • "Together, Synopsys and Samsung Foundry are optimizing multi-die designs, from early to full system implementation and signoff analysis to IP readiness.

Synopsys and Samsung Foundry Boost Power, Performance and Area for Modern SoCs on Samsung's SF2 Process

Retrieved on: 
Wednesday, June 28, 2023

SUNNYVALE, Calif., June 28, 2023 /PRNewswire/ -- Responding to significant market growth in high-performance computing, AI, mobile and automotive applications, Synopsys, Inc. (Nasdaq: SNPS) today announces a collaboration with Samsung to develop optimized digital and custom design flows on Samsung Foundry's SF2 process. This collaboration builds on the success of Synopsys' certified digital and custom design flows for Samsung Foundry's SF3 process. The significant investment by Synopsys across the Synopsys.ai™ full stack AI-driven EDA suite allows mutual customers to accelerate advanced process designs, further differentiate their SoCs and speed time to market. In addition, with Synopsys AI-driven Design Technology Co-Optimization solution, a catalyst for rapid node bring-up, Samsung test cases consistently outperformed power, performance and area (PPA) goals for its advanced process compared to optimization without the use of AI.

Key Points: 
  • (Nasdaq: SNPS ) today announces a collaboration with Samsung to develop optimized digital and custom design flows on Samsung Foundry's SF2 process.
  • This collaboration builds on the success of Synopsys' certified digital and custom design flows for Samsung Foundry's SF3 process.
  • The significant investment by Synopsys across the Synopsys.ai™ full stack AI-driven EDA suite allows mutual customers to accelerate advanced process designs, further differentiate their SoCs and speed time to market.
  • Learn more about Synopsys Digital Design Family at: https://www.synopsys.com/implementation-and-signoff/fusion-design-platfo...
    Learn more about Synopsys Custom Design Family at: https://www.synopsys.com/implementation-and-signoff/custom-design-platfo...

Ansys and Synopsys Accelerate RFIC Semiconductor Design with New Reference Flow for Samsung Technology

Retrieved on: 
Wednesday, June 28, 2023

PITTSBURGH, June 28, 2023 /PRNewswire/ -- Recognizing the increasing challenges faced by designers of 5G/6G systems-on-chip (SoCs) and autonomous driving systems, Ansys (NASDAQ: ANSS) and Synopsys, Inc. (NASDAQ: SNPS) announced the availability of a new reference flow for radio-frequency integrated circuit (RFIC) design developed with Samsung Foundry for its 14LPU process technology. The reference flow helps ensure that mutual customers can optimize RFIC designs with Ansys' golden signoff electromagnetic analysis together with Synopsys' comprehensive analog/RF and mixed-signal design and verification solution.

Key Points: 
  • (NASDAQ: SNPS) announced the availability of a new reference flow for radio-frequency integrated circuit (RFIC) design developed with Samsung Foundry for its 14LPU process technology.
  • The reference flow helps ensure that mutual customers can optimize RFIC designs with Ansys' golden signoff electromagnetic analysis together with Synopsys' comprehensive analog/RF and mixed-signal design and verification solution.
  • Key components of the reference flow include the Synopsys Custom Design Family , featuring the Synopsys PrimeSim™ continuum of circuit simulation solutions, and electromagnetic signoff analysis provided by Ansys® RaptorX™ Electromagnetic Modeling Family , Ansys® Exalto™ Electromagnetic Extraction and Signoff , and Ansys® VeloceRF™ Inductor and Transformer Design Tools .
  • "Our latest collaboration with Ansys on Synopsys' new RF design reference flow supporting Samsung's advanced 14nm process node provides an open and optimized flow that delivers exceptional quality-of-results for advanced 5G/6G wireless systems."

AMD Introduces World’s Largest FPGA-Based Adaptive SoC for Emulation and Prototyping

Retrieved on: 
Tuesday, June 27, 2023

SANTA CLARA, Calif., June 27, 2023 (GLOBE NEWSWIRE) -- AMD (NASDAQ: AMD) today announced the AMD Versal™ Premium VP1902 adaptive system-on-chip (SoC), the world’s largest1 adaptive SoC. The VP1902 adaptive SoC is an emulation-class, chiplet-based device designed to streamline the verification of increasingly complex semiconductor designs. Offering 2X2 the capacity over the prior generation, designers can confidently innovate and validate application-specific integrated circuits (ASICs) and SoC designs to help bring next generation technologies to market faster.AI workloads are driving increased complexity in chipmaking, requiring next-generation solutions to develop the chips of tomorrow. FPGA-based emulation and prototyping provides the highest level of performance, allowing faster silicon verification and enabling developers to shift left in the design cycle and begin software development well before silicon tape-out. AMD, through Xilinx, brings over 17 years of leadership and six generations of the industry’s highest capacity emulation devices, which have nearly doubled in capacity each generation3.“Delivering foundational compute technology to enable our customers is a top priority. In emulation and prototyping, that means delivering the highest capacity and performance possible,” said Kirk Saban, corporate vice president, Product, Software, & Solutions Marketing, Adaptive and Embedded Computing Group, AMD. “Chip designers can confidently emulate and prototype next-generation products using our VP1902 adaptive SoC, accelerating tomorrow’s innovations in AI, autonomous vehicles, Industry 5.0 and other emerging technologies.”

Key Points: 
  • ꟷ AMD Versal Premium VP1902 adaptive SoC offers 2X the capacity of previous-generation FPGAs, providing chipmakers with the tools to bring new ASIC and SoC designs to market faster ─
    ꟷ Collaboration with EDA leaders Cadence, Siemens and Synopsys helps ensure chip designers have access to scalable ecosystem of fully-featured solutions ꟷ
    SANTA CLARA, Calif., June 27, 2023 (GLOBE NEWSWIRE) -- AMD (NASDAQ: AMD) today announced the AMD Versal™ Premium VP1902 adaptive system-on-chip (SoC), the world’s largest1 adaptive SoC.
  • The VP1902 adaptive SoC is an emulation-class, chiplet-based device designed to streamline the verification of increasingly complex semiconductor designs.
  • In emulation and prototyping, that means delivering the highest capacity and performance possible,” said Kirk Saban, corporate vice president, Product, Software, & Solutions Marketing, Adaptive and Embedded Computing Group, AMD.
  • The AMD Versal Premium VP1902 adaptive SoC will begin sampling in Q3 to early access customers with production expected in the first half of 2024.

Global Engineering Software Industry Research 2023-2028 Featuring Dassault Systemes, AutoDesk, Cadence Design Systems, ANSYS, Synopsys, Bentley Systems, Aspen Technology, Siemens

Retrieved on: 
Friday, June 16, 2023

The global construction industry is a major user of engineering software solutions.

Key Points: 
  • The global construction industry is a major user of engineering software solutions.
  • As the construction industry continues to grow, the demand for engineering software solutions that can help streamline the design and construction process is expected to increase.
  • This study also provides a competitive landscape of the industry and profiles some of the leading players in the Global Engineering Software industry including Dassault Systemes, AutoDesk Inc., Cadence Design Systems, ANSYS Inc., Synopsys Inc., Bentley Systems Inc., Aspen Technology Inc., Siemens AG and others.
  • The report analyses the Engineering Software Market by End User Industry (Automotive and Transportation Industry, Aerospace and Defense Industry, Healthcare Industry, Other Industries).

Synopsys and Samsung Collaborate to Deliver Broad IP Portfolio Across All Advanced Samsung Foundry Processes

Retrieved on: 
Wednesday, June 14, 2023

MOUNTAIN VIEW, Calif., June 13, 2023 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS) today announced an expanded agreement with Samsung Foundry to develop a broad portfolio of IP to reduce design risk and accelerate silicon success for automotive, mobile, high-performance computing (HPC) and multi-die designs. This agreement expands Synopsys' collaboration with Samsung to enhance the Synopsys IP offering for Samsung's advanced 8LPU, SF5, SF4 and SF3 processes and includes Foundation IP, USB, PCI Express, 112G Ethernet, UCIe, LPDDR, DDR, MIPI and more. In addition, Synopsys will optimize IP for Samsung's SF5A and SF4A automotive process nodes to meet stringent Grade 1 or Grade 2 temperature and AEC-Q100 reliability requirements, enabling automotive chip designers to reduce their design effort and accelerate AEC-Q100 qualification. The auto-grade IP for ADAS SoCs will include design failure mode and effect analysis (DFMEA) reports that can save months of development effort for automotive SoC applications.

Key Points: 
  • (Nasdaq: SNPS ) today announced an expanded agreement with Samsung Foundry to develop a broad portfolio of IP to reduce design risk and accelerate silicon success for automotive, mobile, high-performance computing (HPC) and multi-die designs.
  • This agreement expands Synopsys' collaboration with Samsung to enhance the Synopsys IP offering for Samsung's advanced 8LPU, SF5, SF4 and SF3 processes and includes Foundation IP, USB, PCI Express, 112G Ethernet, UCIe, LPDDR, DDR, MIPI and more.
  • The auto-grade IP for ADAS SoCs will include design failure mode and effect analysis (DFMEA) reports that can save months of development effort for automotive SoC applications.
  • "Samsung's longstanding collaboration with Synopsys, as our primary IP partner, has benefited our mutual customers by providing access to high-quality IP through each generation of Samsung's technology advancements," said Jongshin Shin, corporate executive vice president of Foundry IP Development at Samsung Electronics.