Instruction set architectures

Toshiba Releases Arm® Cortex®-M4 Microcontrollers for Motor Control as First Products in the TXZ+TM Family Advanced Class

Retrieved on: 
Thursday, July 29, 2021
Semiconductor, Consumer electronics, Technology, Manufacturing, Software, Other Manufacturing, Hardware, Computer architecture, Computing, Companies, Acorn Computers, Instruction set architectures, Embedded microprocessors, Microcontrollers, ARM Cortex-M, ARM architecture, Arm Ltd., SuperH, Toshiba

Toshiba Electronic Devices & Storage Corporation ("Toshiba") has started the mass production of 12 new devices in the M4K group for motor control as the first products of the TXZ+TM family advanced class, and will start mass production of another 10 products in the M4M group in August 2021.

Key Points: 
  • Toshiba Electronic Devices & Storage Corporation ("Toshiba") has started the mass production of 12 new devices in the M4K group for motor control as the first products of the TXZ+TM family advanced class, and will start mass production of another 10 products in the M4M group in August 2021.
  • Both the M4K and M4M groups of microcontrollers will be manufactured in a 40nm process, and belong to the TXZ4A+ series .
  • View the full release here: https://www.businesswire.com/news/home/20210728005418/en/
    Toshiba: TXZ+ Family Advanced Class, Arm Cortex-M4 Microcontrollers for Motor Control (Graphic: Business Wire)
    These products use Arm Cortex-M4 core with FPU, running up to 160MHz, and integrating motor control circuit A-PMD (advance-programmable motor driver), 32-bit encoder A-ENC (advanced-encoder) and vector engine A-VE+ (advanced vector engine plus).
  • High performance Arm Cortex-M4 core with FPU, max 160MHz
    Motor control for consumer home appliances and industrial equipment.

The 2021 RISC-V Summit Will Demonstrate Adoptions and Technical Advances This December in San Francisco

Retrieved on: 
Wednesday, July 28, 2021
Semiconductor, Hardware, Electronic design automation, Technology, Software, Computer architecture, Instruction set architectures, Computers, Computing, Reduced instruction set computer, RISC-V, Acorn Computers, RISC-V International, Design Automation Conference (DAC), RISC-V INTERNATIONAL, DESIGN AUTOMATION CONFERENCE (DAC)

RISC-V International announced the 2021 RISC-V Summit that will bring together the open hardware community for three days of deep technical talks, industry updates, networking, and more.

Key Points: 
  • RISC-V International announced the 2021 RISC-V Summit that will bring together the open hardware community for three days of deep technical talks, industry updates, networking, and more.
  • The RISC-V Summit will be held at Moscone West in San Francisco from December 6-8, 2021, and will feature hybrid in-person and virtual activities to connect with a global audience.
  • Were excited to be able to offer attendees an even richer event experience to inspire their future designs with our partnership with RISC-V Summit.
  • Sponsorship opportunities for the 2021 RISC-V Summit will be offered at the Diamond, Platinum, Gold, Silver, Bronze, and Startup and University levels.

CAES Receives Contract from Vinnova to Advance High Performance RISC-V Space Computing

Retrieved on: 
Monday, July 19, 2021
Semiconductor, Security, Technology, Satellite, Aerospace, Manufacturing, Computer architecture, Microprocessors, Computing, 64-bit computers, Instruction set architectures, European Space Agency, Leon, SPARC, Radiation hardening, Reduced instruction set computer, RISC-V

The new NOEL-V fault-tolerant, 64-bit processor core is based on the open RISC-V instruction set architecture and builds upon CAES heritage with the SPARC/LEON architecture.

Key Points: 
  • The new NOEL-V fault-tolerant, 64-bit processor core is based on the open RISC-V instruction set architecture and builds upon CAES heritage with the SPARC/LEON architecture.
  • It marks the newest addition to CAES trusted fault tolerant space computing product portfolio.
  • We look forward to working with Vinnova and our project partners to enhance our RISC-V processor technology to meet our customers next generation space program needs, said Mike Kahn, President and CEO of CAES.
  • The results of this initiative with Vinnova will inform our future radiation-hardened NOEL-V microprocessor development in collaboration with the European Space Agency, said Sandi Habinc, General Manager of Gaisler Products, CAES.

MEDIA ALERT: Join John Min, Andes Director of FAE for his RISC-V Forum Presentation “RISC-V Grows Up and Goes Big!”

Retrieved on: 
Monday, July 19, 2021
Computer architecture, Computing, Instruction set architectures, Technology, Microcontrollers, RISC-V, Reduced instruction set computer, Microprocessor

It will also describe RISC-V embedded technologies in the automotive industry, medical equipment, communications, graphic cards, and in disk drives.

Key Points: 
  • It will also describe RISC-V embedded technologies in the automotive industry, medical equipment, communications, graphic cards, and in disk drives.
  • Who: John Min, Andes Technology Corp.'s Director of FAE and specialist in Microprocessor based SOCs.
  • Why: John Mins presentation will detail the phenomenal growth for the RISC-V architecture over last 6 years.
  • Initially developed for academic research as a controller for Vector engine, it has found home in many embedded microcontrollers.

Canaan Releases Self-developed Edge AI Chip, the Kendryte K510

Retrieved on: 
Thursday, July 8, 2021
Computer architecture, Instruction set architectures, Reduced instruction set computer, RISC-V, Computing, Computers

BEIJING, July8 2021 /PRNewswire/ -- Canaan Inc. (NASDAQ: CAN) ("Canaan" or the "Company"), a leading high-performance computing solutions provider, today announced the release of the Kendryte K510 (the "K510"), an independently designed and developed RISC-V based edge AI chip, at the 2021 World Artificial Intelligence Conference.

Key Points: 
  • BEIJING, July8 2021 /PRNewswire/ -- Canaan Inc. (NASDAQ: CAN) ("Canaan" or the "Company"), a leading high-performance computing solutions provider, today announced the release of the Kendryte K510 (the "K510"), an independently designed and developed RISC-V based edge AI chip, at the 2021 World Artificial Intelligence Conference.
  • In addition, by adopting a RISC-V open-source architecture, the K510 is highly customizable and capable of empowering developers in their execution of scenario-based development.
  • Mr. Nangeng Zhang, Chairman and Chief Executive Officer of Canaan, commented, "The Kendryte K510 chip is the result of two years of work by our R&D team to further innovative and optimize our core chip architecture.
  • With upgraded machine vision and improved programming flexibility, the Kendryte K510 can better address the demands of mid- to high-end application scenarios.

New TySOM-M Series Targets Low Power, High Security Applications

Retrieved on: 
Wednesday, July 7, 2021
Technology, Hardware, Electronic design automation, Security, Computer architecture, Computing, Microprocessors, Instruction set architectures, Fabless semiconductor companies, SiFive, Microcontrollers, System on a chip, Hardware acceleration, RISC-V, Field-programmable gate array, Arc, TySOM, Aldec, TYSOM, ALDEC

Microchips PolarFire SoC FPGA boasts low power consumption, impressive thermal efficiency and defense-grade security for smart, connected systems.

Key Points: 
  • Microchips PolarFire SoC FPGA boasts low power consumption, impressive thermal efficiency and defense-grade security for smart, connected systems.
  • The RISC-V CPU micro-architecture implementation in the PolarFire SoC MPFS250T-FCG1152 is a five-stage single issue in-order pipeline.
  • The five cores are 1x SiFive E51 Monitor core (RV64IMAC) and 4x SiFive U54 Application cores (RV64GC).
  • Aldecs decision to use PolarFire SoC FPGA in its new TySOM-M family will enable users to design for a wealth of applications requiring low power and high security.

Andes Technology Announces over 2 Billion Shipments of Andes-Embedded SoCs in 2020

Retrieved on: 
Tuesday, July 6, 2021
Computer architecture, Instruction set architectures, Microcontrollers, Andes Technology, Computing, RISC-V, Computers, Reduced instruction set computer, Symposium on Combinatorial Search, Fabless semiconductor companies

Although the pandemic has impacted the global economy, the SoC shipments containing Andes CPU IPs still hit a record high.

Key Points: 
  • Although the pandemic has impacted the global economy, the SoC shipments containing Andes CPU IPs still hit a record high.
  • Most of the 2 billion shipments in 2020 are Andes processors of the third generation architecture (V3), but Andes RISC-V series IPs launched in 2017 have started to contribute royalties as well, said Frankwell Lin, CEO of Andes Technology.
  • The production quantity of SoCs embedded with Andes processors reaches nearly 5.5 million units per day.
  • The annual volume of Andes-Embedded SoCs has exceeded 2 billion since 2020 and the cumulative volume has reached 7 billion.

New Intel XPU Innovations Target HPC and AI

Retrieved on: 
Monday, June 28, 2021
Data management, Semiconductor, Consumer electronics, Technology, Other Technology, Networks, Hardware, Computer architecture, Computing, Computers, Instruction set architectures, Intel, Xeon, x86, Xeon Phi, Intel C++ Compiler

Intel is announcing advances in its Xeon processor for HPC and AI as well as innovations in memory, software, exascale-class storage, and networking technologies for a range of HPC use cases.

Key Points: 
  • Intel is announcing advances in its Xeon processor for HPC and AI as well as innovations in memory, software, exascale-class storage, and networking technologies for a range of HPC use cases.
  • Earlier this year, Intel extended its leadership position in HPC with the launch of 3rd Gen Intel Xeon Scalable processors.
  • Compared to its closest x86 competitor, the 3rd Gen Intel Xeon Scalable processor delivers better performance across a range of popular HPC workloads.
  • Intel, the Intel logo and other Intel marks are trademarks of Intel Corporation or its subsidiaries.

Intel Core Processors and Intel Bridge Technology Unleash Windows 11 Experience

Retrieved on: 
Thursday, June 24, 2021
Semiconductor, Hardware, Consumer electronics, Technology, Software, Computer architecture, Computing, Computers, IBM PC compatibles, Instruction set architectures, Intel, x86, Intel C++ Compiler, Intel vPro

Intel and Microsofts long-standing approach to OS, system architecture and hardware integration enables the best PC experience for customers.

Key Points: 
  • Intel and Microsofts long-standing approach to OS, system architecture and hardware integration enables the best PC experience for customers.
  • The combination of Windows 11 and Intel technologies and platforms offers unmatched performance, compatibility and experiences on Windows, and were bringing peoples favorite experiences from the phone to the PC with Intel Bridge Technology.
  • Intel Bridge Technology is a runtime post-compiler that enables applications to run natively on x86-based devices, including running those applications on Windows.
  • Intel, the Intel logo and other Intel marks are trademarks of Intel Corporation or its subsidiaries.

MPLAB® Cloud Tools Ecosystem Brings Secure, Platform-independent Development Workflow to PIC® and AVR® Microcontrollers

Retrieved on: 
Wednesday, June 23, 2021
Embedded systems, Microcontrollers, Computing, Computer science, MPLAB, Computer architecture, Instruction set architectures, AVR microcontrollers, Microchip Technology, Integrated development environment, PIC microcontrollers

Microchips MPLAB cloud tools ecosystem incorporates three powerful components designed to modernize the development workflow for PIC and AVR microcontrollers.

Key Points: 
  • Microchips MPLAB cloud tools ecosystem incorporates three powerful components designed to modernize the development workflow for PIC and AVR microcontrollers.
  • Selected code and projects instantly populate in the MPLAB Xpress Integrated Development Environment (IDE) for further development.
  • The MPLAB cloud tools ecosystem, which has been designed as a front end to access these cloud tools based on the development flow the client is in, also has a quick start guide and overview of tools.
  • Microchips Curiosity and Curiosity Nano boards are available to evaluate and program its 8-bit PICand AVR MCUsand are supported by the MPLAB cloud tools ecosystem.