GBT Seeks to Develop an AI Empowered Technology for Automatic Compaction of Integrated Circuit Layout Data IPs
SAN DIEGO, Feb. 15, 2022 (GLOBE NEWSWIRE) -- GBT Technologies Inc. (OTC PINK: GTCH ) ("GBT” or the “Company”), is developing an AI empowered technology for automatic compaction of integrated circuit (IC) layout blocks. As modern ICs are ever growing in complexity and size there is a high demand for design automation to reduce silicon area and increase its yield. Microchips are expected to include more functionalities, consuming less power, reducing in size and ultimately cheaper. The semiconductor field is pushing the envelope by introducing smaller manufacturing processes scaling into deep nanometer ranges. Scaling down the manufacturing process enables billions of transistors on die, higher performance, and power consumption reduction, but introduces new design challenges due to complicated physics rules. IC projects may take longer time as they need to comply with a vast amount of complex design rules and constraints. It is the Company’s position that an automatic IC layout compaction technology can be an efficient way to reduce new and existing layout IPs size utilizing less silicon area with the goal of increasing the overall yield.
- SAN DIEGO, Feb. 15, 2022 (GLOBE NEWSWIRE) -- GBT Technologies Inc. ( OTC PINK:GTCH ) ("GBT or the Company), is developing an AI empowered technology for automatic compaction of integrated circuit (IC) layout blocks.
- It is the Companys position that an automatic IC layout compaction technology can be an efficient way to reduce new and existing layout IPs size utilizing less silicon area with the goal of increasing the overall yield.
- GBT is now designing an AI empowered technology to read existing and new microchips layout data with the goal of producing the densest layout block possible.
- The technology is targeted for Analog, Digital, RF and MIXED integrated circuits styles with the goal of supporting GDSII and Oasis data.