Arasan announces MIPI CSI IP for FPGA supporting full C-PHY 2.0 speeds
SAN JOSE, Calif., Nov. 14, 2022 /PRNewswire/ -- Arasan has released an all new version of its MIPI CSI IP compliant with the CSI-2 v2.1 Specifications supporting C-PHY v2.0 speeds of up to 8 Gbps (for 1channel) for FPGA designs. This IP is designed to meet FPGA timing limitations to run at slower frequencies while still providing the necessary bandwidth.